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@@ -14,14 +14,45 @@
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#define GPMC_IRQ_FIFOEVENTENABLE 0x01
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#define GPMC_IRQ_FIFOEVENTENABLE 0x01
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#define GPMC_IRQ_COUNT_EVENT 0x02
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#define GPMC_IRQ_COUNT_EVENT 0x02
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+/**
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+ * gpmc_nand_ops - Interface between NAND and GPMC
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+ * @nand_write_buffer_empty: get the NAND write buffer empty status.
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+ */
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+struct gpmc_nand_ops {
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+ bool (*nand_writebuffer_empty)(void);
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+};
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+
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+struct gpmc_nand_regs;
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+
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+#if IS_ENABLED(CONFIG_OMAP_GPMC)
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+struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *regs,
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+ int cs);
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+#else
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+static inline gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *regs,
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+ int cs)
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+{
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+ return NULL;
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+}
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+#endif /* CONFIG_OMAP_GPMC */
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+
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+/*--------------------------------*/
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+
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+/* deprecated APIs */
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+#if IS_ENABLED(CONFIG_OMAP_GPMC)
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+void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs);
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+#else
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+static inline void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs)
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+{
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+}
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+#endif /* CONFIG_OMAP_GPMC */
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+/*--------------------------------*/
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+
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extern int gpmc_calc_timings(struct gpmc_timings *gpmc_t,
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extern int gpmc_calc_timings(struct gpmc_timings *gpmc_t,
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struct gpmc_settings *gpmc_s,
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struct gpmc_settings *gpmc_s,
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struct gpmc_device_timings *dev_t);
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struct gpmc_device_timings *dev_t);
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-struct gpmc_nand_regs;
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struct device_node;
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struct device_node;
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-extern void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs);
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extern int gpmc_get_client_irq(unsigned irq_config);
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extern int gpmc_get_client_irq(unsigned irq_config);
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extern unsigned int gpmc_ticks_to_ns(unsigned int ticks);
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extern unsigned int gpmc_ticks_to_ns(unsigned int ticks);
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