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@@ -11826,7 +11826,9 @@ encoder_retry:
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goto encoder_retry;
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goto encoder_retry;
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}
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}
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- pipe_config->dither = pipe_config->pipe_bpp != base_bpp;
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+ /* Dithering seems to not pass-through bits correctly when it should, so
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+ * only enable it on 6bpc panels. */
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+ pipe_config->dither = pipe_config->pipe_bpp == 6*3;
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DRM_DEBUG_KMS("plane bpp: %i, pipe bpp: %i, dithering: %i\n",
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DRM_DEBUG_KMS("plane bpp: %i, pipe bpp: %i, dithering: %i\n",
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base_bpp, pipe_config->pipe_bpp, pipe_config->dither);
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base_bpp, pipe_config->pipe_bpp, pipe_config->dither);
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@@ -12624,17 +12626,17 @@ static int __intel_set_mode(struct drm_crtc *modeset_crtc,
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modeset_update_crtc_power_domains(state);
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modeset_update_crtc_power_domains(state);
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- drm_atomic_helper_commit_planes(dev, state);
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-
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/* Now enable the clocks, plane, pipe, and connectors that we set up. */
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/* Now enable the clocks, plane, pipe, and connectors that we set up. */
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for_each_crtc_in_state(state, crtc, crtc_state, i) {
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for_each_crtc_in_state(state, crtc, crtc_state, i) {
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- if (!needs_modeset(crtc->state) || !crtc->state->enable)
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+ if (!needs_modeset(crtc->state) || !crtc->state->enable) {
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+ drm_atomic_helper_commit_planes_on_crtc(crtc_state);
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continue;
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continue;
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+ }
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update_scanline_offset(to_intel_crtc(crtc));
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update_scanline_offset(to_intel_crtc(crtc));
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dev_priv->display.crtc_enable(crtc);
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dev_priv->display.crtc_enable(crtc);
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- intel_crtc_enable_planes(crtc);
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+ drm_atomic_helper_commit_planes_on_crtc(crtc_state);
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}
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}
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/* FIXME: add subpixel order */
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/* FIXME: add subpixel order */
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@@ -12891,20 +12893,11 @@ intel_modeset_stage_output_state(struct drm_device *dev,
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return 0;
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return 0;
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}
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}
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-static bool primary_plane_visible(struct drm_crtc *crtc)
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-{
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- struct intel_plane_state *plane_state =
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- to_intel_plane_state(crtc->primary->state);
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-
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- return plane_state->visible;
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-}
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-
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static int intel_crtc_set_config(struct drm_mode_set *set)
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static int intel_crtc_set_config(struct drm_mode_set *set)
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{
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{
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struct drm_device *dev;
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struct drm_device *dev;
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struct drm_atomic_state *state = NULL;
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struct drm_atomic_state *state = NULL;
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struct intel_crtc_state *pipe_config;
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struct intel_crtc_state *pipe_config;
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- bool primary_plane_was_visible;
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int ret;
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int ret;
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BUG_ON(!set);
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BUG_ON(!set);
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@@ -12943,38 +12936,8 @@ static int intel_crtc_set_config(struct drm_mode_set *set)
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intel_update_pipe_size(to_intel_crtc(set->crtc));
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intel_update_pipe_size(to_intel_crtc(set->crtc));
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- primary_plane_was_visible = primary_plane_visible(set->crtc);
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-
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ret = intel_set_mode_with_config(set->crtc, pipe_config, true);
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ret = intel_set_mode_with_config(set->crtc, pipe_config, true);
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- if (ret == 0 &&
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- pipe_config->base.enable &&
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- pipe_config->base.planes_changed &&
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- !needs_modeset(&pipe_config->base)) {
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- struct intel_crtc *intel_crtc = to_intel_crtc(set->crtc);
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-
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- /*
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- * We need to make sure the primary plane is re-enabled if it
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- * has previously been turned off.
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- */
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- if (ret == 0 && !primary_plane_was_visible &&
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- primary_plane_visible(set->crtc)) {
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- WARN_ON(!intel_crtc->active);
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- intel_post_enable_primary(set->crtc);
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- }
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-
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- /*
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- * In the fastboot case this may be our only check of the
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- * state after boot. It would be better to only do it on
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- * the first update, but we don't have a nice way of doing that
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- * (and really, set_config isn't used much for high freq page
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- * flipping, so increasing its cost here shouldn't be a big
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- * deal).
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- */
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- if (i915.fastboot && ret == 0)
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- intel_modeset_check_state(set->crtc->dev);
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- }
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-
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if (ret) {
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if (ret) {
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DRM_DEBUG_KMS("failed to set mode on [CRTC:%d], err = %d\n",
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DRM_DEBUG_KMS("failed to set mode on [CRTC:%d], err = %d\n",
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set->crtc->base.id, ret);
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set->crtc->base.id, ret);
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@@ -13305,6 +13268,9 @@ intel_check_primary_plane(struct drm_plane *plane,
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*/
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*/
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if (IS_BROADWELL(dev))
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if (IS_BROADWELL(dev))
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intel_crtc->atomic.wait_vblank = true;
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intel_crtc->atomic.wait_vblank = true;
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+
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+ if (crtc_state)
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+ intel_crtc->atomic.post_enable_primary = true;
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}
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}
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/*
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/*
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@@ -13317,6 +13283,10 @@ intel_check_primary_plane(struct drm_plane *plane,
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if (!state->visible || !fb)
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if (!state->visible || !fb)
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intel_crtc->atomic.disable_ips = true;
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intel_crtc->atomic.disable_ips = true;
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+ if (!state->visible && old_state->visible &&
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+ crtc_state && !needs_modeset(&crtc_state->base))
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+ intel_crtc->atomic.pre_disable_primary = true;
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+
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intel_crtc->atomic.fb_bits |=
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intel_crtc->atomic.fb_bits |=
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INTEL_FRONTBUFFER_PRIMARY(intel_crtc->pipe);
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INTEL_FRONTBUFFER_PRIMARY(intel_crtc->pipe);
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@@ -15034,6 +15004,7 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
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struct intel_plane_state *plane_state;
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struct intel_plane_state *plane_state;
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memset(crtc->config, 0, sizeof(*crtc->config));
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memset(crtc->config, 0, sizeof(*crtc->config));
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+ crtc->config->base.crtc = &crtc->base;
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crtc->config->quirks |= PIPE_CONFIG_QUIRK_INHERITED_MODE;
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crtc->config->quirks |= PIPE_CONFIG_QUIRK_INHERITED_MODE;
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