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@@ -569,9 +569,10 @@ static int gmc_v8_0_mc_init(struct amdgpu_device *adev)
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/* set the gart size */
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if (amdgpu_gart_size == -1) {
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switch (adev->asic_type) {
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- case CHIP_POLARIS11: /* all engines support GPUVM */
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case CHIP_POLARIS10: /* all engines support GPUVM */
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+ case CHIP_POLARIS11: /* all engines support GPUVM */
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case CHIP_POLARIS12: /* all engines support GPUVM */
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+ case CHIP_VEGAM: /* all engines support GPUVM */
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default:
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adev->gmc.gart_size = 256ULL << 20;
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break;
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@@ -1091,7 +1092,8 @@ static int gmc_v8_0_sw_init(void *handle)
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} else {
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u32 tmp;
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- if (adev->asic_type == CHIP_FIJI)
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+ if ((adev->asic_type == CHIP_FIJI) ||
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+ (adev->asic_type == CHIP_VEGAM))
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tmp = RREG32(mmMC_SEQ_MISC0_FIJI);
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else
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tmp = RREG32(mmMC_SEQ_MISC0);
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