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Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 fixes from Ingo Molnar:
 "Misc fixes"

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/intel/lpss: Add pin control support to Intel low power subsystem
  perf/x86/intel: Mark MEM_LOAD_UOPS_MISS_RETIRED as precise on SNB
  x86: Remove now-unused save_rest()
  x86/smpboot: Fix announce_cpu() to printk() the last "OK" properly
Linus Torvalds 12 lat temu
rodzic
commit
f42bcf1aa8

+ 3 - 2
arch/x86/Kconfig

@@ -481,11 +481,12 @@ config X86_INTEL_LPSS
 	bool "Intel Low Power Subsystem Support"
 	bool "Intel Low Power Subsystem Support"
 	depends on ACPI
 	depends on ACPI
 	select COMMON_CLK
 	select COMMON_CLK
+	select PINCTRL
 	---help---
 	---help---
 	  Select to build support for Intel Low Power Subsystem such as
 	  Select to build support for Intel Low Power Subsystem such as
 	  found on Intel Lynxpoint PCH. Selecting this option enables
 	  found on Intel Lynxpoint PCH. Selecting this option enables
-	  things like clock tree (common clock framework) which are needed
-	  by the LPSS peripheral drivers.
+	  things like clock tree (common clock framework) and pincontrol
+	  which are needed by the LPSS peripheral drivers.
 
 
 config X86_RDC321X
 config X86_RDC321X
 	bool "RDC R-321x SoC"
 	bool "RDC R-321x SoC"

+ 1 - 0
arch/x86/kernel/cpu/perf_event_intel_ds.c

@@ -584,6 +584,7 @@ struct event_constraint intel_snb_pebs_event_constraints[] = {
 	INTEL_EVENT_CONSTRAINT(0xd0, 0xf),    /* MEM_UOP_RETIRED.* */
 	INTEL_EVENT_CONSTRAINT(0xd0, 0xf),    /* MEM_UOP_RETIRED.* */
 	INTEL_EVENT_CONSTRAINT(0xd1, 0xf),    /* MEM_LOAD_UOPS_RETIRED.* */
 	INTEL_EVENT_CONSTRAINT(0xd1, 0xf),    /* MEM_LOAD_UOPS_RETIRED.* */
 	INTEL_EVENT_CONSTRAINT(0xd2, 0xf),    /* MEM_LOAD_UOPS_LLC_HIT_RETIRED.* */
 	INTEL_EVENT_CONSTRAINT(0xd2, 0xf),    /* MEM_LOAD_UOPS_LLC_HIT_RETIRED.* */
+	INTEL_EVENT_CONSTRAINT(0xd3, 0xf),    /* MEM_LOAD_UOPS_LLC_MISS_RETIRED.* */
 	INTEL_UEVENT_CONSTRAINT(0x02d4, 0xf), /* MEM_LOAD_UOPS_MISC_RETIRED.LLC_MISS */
 	INTEL_UEVENT_CONSTRAINT(0x02d4, 0xf), /* MEM_LOAD_UOPS_MISC_RETIRED.LLC_MISS */
 	EVENT_CONSTRAINT_END
 	EVENT_CONSTRAINT_END
 };
 };

+ 0 - 15
arch/x86/kernel/entry_64.S

@@ -487,21 +487,6 @@ ENDPROC(native_usergs_sysret64)
 	TRACE_IRQS_OFF
 	TRACE_IRQS_OFF
 	.endm
 	.endm
 
 
-ENTRY(save_rest)
-	PARTIAL_FRAME 1 (REST_SKIP+8)
-	movq 5*8+16(%rsp), %r11	/* save return address */
-	movq_cfi rbx, RBX+16
-	movq_cfi rbp, RBP+16
-	movq_cfi r12, R12+16
-	movq_cfi r13, R13+16
-	movq_cfi r14, R14+16
-	movq_cfi r15, R15+16
-	movq %r11, 8(%rsp)	/* return address */
-	FIXUP_TOP_OF_STACK %r11, 16
-	ret
-	CFI_ENDPROC
-END(save_rest)
-
 /* save complete stack frame */
 /* save complete stack frame */
 	.pushsection .kprobes.text, "ax"
 	.pushsection .kprobes.text, "ax"
 ENTRY(save_paranoid)
 ENTRY(save_paranoid)

+ 2 - 1
arch/x86/kernel/smpboot.c

@@ -653,6 +653,7 @@ static void announce_cpu(int cpu, int apicid)
 {
 {
 	static int current_node = -1;
 	static int current_node = -1;
 	int node = early_cpu_to_node(cpu);
 	int node = early_cpu_to_node(cpu);
+	int max_cpu_present = find_last_bit(cpumask_bits(cpu_present_mask), NR_CPUS);
 
 
 	if (system_state == SYSTEM_BOOTING) {
 	if (system_state == SYSTEM_BOOTING) {
 		if (node != current_node) {
 		if (node != current_node) {
@@ -661,7 +662,7 @@ static void announce_cpu(int cpu, int apicid)
 			current_node = node;
 			current_node = node;
 			pr_info("Booting Node %3d, Processors ", node);
 			pr_info("Booting Node %3d, Processors ", node);
 		}
 		}
-		pr_cont(" #%d%s", cpu, cpu == (nr_cpu_ids - 1) ? " OK\n" : "");
+		pr_cont(" #%4d%s", cpu, cpu == max_cpu_present ? " OK\n" : "");
 		return;
 		return;
 	} else
 	} else
 		pr_info("Booting Node %d Processor %d APIC 0x%x\n",
 		pr_info("Booting Node %d Processor %d APIC 0x%x\n",