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@@ -766,9 +766,11 @@ static int bdw_init_workarounds(struct intel_engine_cs *ring)
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* workaround for for a possible hang in the unlikely event a TLB
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* workaround for for a possible hang in the unlikely event a TLB
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* invalidation occurs during a PSD flush.
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* invalidation occurs during a PSD flush.
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*/
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*/
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+ /* WaHdcDisableFetchWhenMasked:bdw */
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/* WaDisableFenceDestinationToSLM:bdw (GT3 pre-production) */
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/* WaDisableFenceDestinationToSLM:bdw (GT3 pre-production) */
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WA_SET_BIT_MASKED(HDC_CHICKEN0,
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WA_SET_BIT_MASKED(HDC_CHICKEN0,
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HDC_FORCE_NON_COHERENT |
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HDC_FORCE_NON_COHERENT |
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+ HDC_DONOT_FETCH_MEM_WHEN_MASKED |
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(IS_BDW_GT3(dev) ? HDC_FENCE_DEST_SLM_DISABLE : 0));
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(IS_BDW_GT3(dev) ? HDC_FENCE_DEST_SLM_DISABLE : 0));
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/* Wa4x4STCOptimizationDisable:bdw */
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/* Wa4x4STCOptimizationDisable:bdw */
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