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@@ -3093,24 +3093,45 @@ static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
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struct e1000_nvm_info *nvm = &hw->nvm;
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u32 bank1_offset = nvm->flash_bank_size * sizeof(u16);
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u32 act_offset = E1000_ICH_NVM_SIG_WORD * 2 + 1;
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+ u32 nvm_dword = 0;
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u8 sig_byte = 0;
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s32 ret_val;
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switch (hw->mac.type) {
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- /* In SPT, read from the CTRL_EXT reg instead of
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- * accessing the sector valid bits from the nvm
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- */
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case e1000_pch_spt:
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- *bank = er32(CTRL_EXT)
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- & E1000_CTRL_EXT_NVMVS;
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- if ((*bank == 0) || (*bank == 1)) {
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- e_dbg("ERROR: No valid NVM bank present\n");
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- return -E1000_ERR_NVM;
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- } else {
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- *bank = *bank - 2;
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+ bank1_offset = nvm->flash_bank_size;
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+ act_offset = E1000_ICH_NVM_SIG_WORD;
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+
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+ /* set bank to 0 in case flash read fails */
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+ *bank = 0;
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+
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+ /* Check bank 0 */
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+ ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset,
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+ &nvm_dword);
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+ if (ret_val)
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+ return ret_val;
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+ sig_byte = (u8)((nvm_dword & 0xFF00) >> 8);
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+ if ((sig_byte & E1000_ICH_NVM_VALID_SIG_MASK) ==
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+ E1000_ICH_NVM_SIG_VALUE) {
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+ *bank = 0;
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return 0;
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}
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- break;
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+
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+ /* Check bank 1 */
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+ ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset +
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+ bank1_offset,
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+ &nvm_dword);
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+ if (ret_val)
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+ return ret_val;
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+ sig_byte = (u8)((nvm_dword & 0xFF00) >> 8);
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+ if ((sig_byte & E1000_ICH_NVM_VALID_SIG_MASK) ==
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+ E1000_ICH_NVM_SIG_VALUE) {
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+ *bank = 1;
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+ return 0;
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+ }
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+
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+ e_dbg("ERROR: No valid NVM bank present\n");
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+ return -E1000_ERR_NVM;
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case e1000_ich8lan:
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case e1000_ich9lan:
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eecd = er32(EECD);
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