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+/*
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+ * This file is licensed under the terms of the GNU General Public License
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+ * version 2. This program is licensed "as is" without any warranty of any
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+ * kind, whether express or implied.
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+ */
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/pinctrl/omap.h>
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+
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+#include "skeleton.dtsi"
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+
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+/ {
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+ compatible = "ti,dm814";
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+ interrupt-parent = <&intc>;
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+
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+ aliases {
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+ i2c0 = &i2c1;
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+ i2c1 = &i2c2;
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+ serial0 = &uart1;
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+ serial1 = &uart2;
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+ serial2 = &uart3;
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+ ethernet0 = &cpsw_emac0;
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+ ethernet1 = &cpsw_emac1;
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+ };
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+
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+ cpus {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ cpu@0 {
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+ compatible = "arm,cortex-a8";
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+ device_type = "cpu";
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+ reg = <0>;
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+ };
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+ };
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+
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+ pmu {
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+ compatible = "arm,cortex-a8-pmu";
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+ interrupts = <3>;
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+ };
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+
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+ /*
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+ * The soc node represents the soc top level view. It is used for IPs
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+ * that are not memory mapped in the MPU view or for the MPU itself.
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+ */
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+ soc {
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+ compatible = "ti,omap-infra";
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+ mpu {
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+ compatible = "ti,omap3-mpu";
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+ ti,hwmods = "mpu";
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+ };
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+ };
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+
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+ ocp {
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+ compatible = "simple-bus";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges;
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+ ti,hwmods = "l3_main";
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+
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+ /*
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+ * See TRM "Table 1-317. L4LS Instance Summary", just deduct
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+ * 0x1000 from the 1-317 addresses to get the device address
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+ */
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+ l4ls: l4ls@48000000 {
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+ compatible = "ti,dm814-l4ls", "simple-bus";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges = <0 0x48000000 0x2000000>;
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+
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+ i2c1: i2c@28000 {
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+ compatible = "ti,omap4-i2c";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ ti,hwmods = "i2c1";
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+ reg = <0x28000 0x1000>;
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+ interrupts = <70>;
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+ };
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+
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+ elm: elm@80000 {
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+ compatible = "ti,814-elm";
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+ ti,hwmods = "elm";
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+ reg = <0x80000 0x2000>;
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+ interrupts = <4>;
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+ };
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+
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+ gpio1: gpio@32000 {
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+ compatible = "ti,omap4-gpio";
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+ ti,hwmods = "gpio1";
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+ ti,gpio-always-on;
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+ reg = <0x32000 0x2000>;
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+ interrupts = <96>;
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ interrupt-controller;
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+ #interrupt-cells = <2>;
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+ };
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+
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+ gpio2: gpio@4c000 {
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+ compatible = "ti,omap4-gpio";
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+ ti,hwmods = "gpio2";
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+ ti,gpio-always-on;
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+ reg = <0x4c000 0x2000>;
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+ interrupts = <98>;
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ interrupt-controller;
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+ #interrupt-cells = <2>;
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+ };
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+
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+ i2c2: i2c@2a000 {
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+ compatible = "ti,omap4-i2c";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ ti,hwmods = "i2c2";
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+ reg = <0x2a000 0x1000>;
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+ interrupts = <71>;
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+ };
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+
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+ mcspi1: spi@30000 {
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+ compatible = "ti,omap4-mcspi";
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+ reg = <0x30000 0x1000>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ interrupts = <65>;
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+ ti,spi-num-cs = <4>;
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+ ti,hwmods = "mcspi1";
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+ dmas = <&edma 16 &edma 17
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+ &edma 18 &edma 19>;
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+ dma-names = "tx0", "rx0", "tx1", "rx1";
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+ };
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+
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+ timer1: timer@2e000 {
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+ compatible = "ti,dm814-timer";
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+ reg = <0x2e000 0x2000>;
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+ interrupts = <67>;
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+ ti,hwmods = "timer1";
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+ ti,timer-alwon;
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+ };
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+
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+ uart1: uart@20000 {
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+ compatible = "ti,omap3-uart";
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+ ti,hwmods = "uart1";
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+ reg = <0x20000 0x2000>;
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+ clock-frequency = <48000000>;
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+ interrupts = <72>;
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+ dmas = <&edma 26 &edma 27>;
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+ dma-names = "tx", "rx";
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+ };
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+
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+ uart2: uart@22000 {
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+ compatible = "ti,omap3-uart";
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+ ti,hwmods = "uart2";
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+ reg = <0x22000 0x2000>;
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+ clock-frequency = <48000000>;
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+ interrupts = <73>;
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+ dmas = <&edma 28 &edma 29>;
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+ dma-names = "tx", "rx";
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+ };
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+
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+ uart3: uart@24000 {
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+ compatible = "ti,omap3-uart";
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+ ti,hwmods = "uart3";
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+ reg = <0x24000 0x2000>;
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+ clock-frequency = <48000000>;
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+ interrupts = <74>;
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+ dmas = <&edma 30 &edma 31>;
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+ dma-names = "tx", "rx";
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+ };
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+
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+ timer2: timer@40000 {
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+ compatible = "ti,dm814-timer";
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+ reg = <0x40000 0x2000>;
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+ interrupts = <68>;
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+ ti,hwmods = "timer2";
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+ };
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+
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+ timer3: timer@42000 {
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+ compatible = "ti,dm814-timer";
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+ reg = <0x42000 0x2000>;
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+ interrupts = <69>;
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+ ti,hwmods = "timer3";
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+ };
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+
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+ control: control@160000 {
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+ compatible = "ti,dm814-scm", "simple-bus";
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+ reg = <0x160000 0x16d000>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges = <0 0x160000 0x16d000>;
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+
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+ scm_conf: scm_conf@0 {
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+ compatible = "syscon";
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+ reg = <0x0 0x800>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ scm_clocks: clocks {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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+ scm_clockdomains: clockdomains {
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+ };
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+ };
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+
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+ pincntl: pinmux@800 {
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+ compatible = "pinctrl-single";
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+ reg = <0x800 0xc38>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ pinctrl-single,register-width = <32>;
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+ pinctrl-single,function-mask = <0x300ff>;
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+ };
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+ };
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+
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+ prcm: prcm@180000 {
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+ compatible = "ti,dm814-prcm", "simple-bus";
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+ reg = <0x180000 0x4000>;
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+
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+ prcm_clocks: clocks {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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+ prcm_clockdomains: clockdomains {
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+ };
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+ };
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+
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+ pllss: pllss@1c5000 {
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+ compatible = "ti,dm814-pllss", "simple-bus";
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+ reg = <0x1c5000 0x2000>;
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+
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+ pllss_clocks: clocks {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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+ pllss_clockdomains: clockdomains {
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+ };
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+ };
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+
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+ wdt1: wdt@1c7000 {
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+ compatible = "ti,omap3-wdt";
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+ ti,hwmods = "wd_timer";
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+ reg = <0x1c7000 0x1000>;
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+ interrupts = <91>;
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+ };
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+ };
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+
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+ intc: interrupt-controller@48200000 {
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+ compatible = "ti,dm814-intc";
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+ interrupt-controller;
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+ #interrupt-cells = <1>;
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+ reg = <0x48200000 0x1000>;
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+ };
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+
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+ edma: edma@49000000 {
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+ compatible = "ti,edma3";
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+ ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
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+ reg = <0x49000000 0x10000>,
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+ <0x44e10f90 0x40>;
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+ interrupts = <12 13 14>;
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+ #dma-cells = <1>;
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+ };
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+
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+ /* See TRM "Table 1-318. L4HS Instance Summary" */
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+ l4hs: l4hs@4a000000 {
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+ compatible = "ti,dm814-l4hs", "simple-bus";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges = <0 0x4a000000 0x1b4040>;
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+ };
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+
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+ /* REVISIT: Move to live under l4hs once driver is fixed */
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+ mac: ethernet@4a100000 {
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+ compatible = "ti,cpsw";
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+ ti,hwmods = "cpgmac0";
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+ clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
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+ clock-names = "fck", "cpts";
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+ cpdma_channels = <8>;
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+ ale_entries = <1024>;
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+ bd_ram_size = <0x2000>;
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+ no_bd_ram = <0>;
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+ rx_descs = <64>;
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+ mac_control = <0x20>;
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+ slaves = <2>;
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+ active_slave = <0>;
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+ cpts_clock_mult = <0x80000000>;
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+ cpts_clock_shift = <29>;
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+ reg = <0x4a100000 0x800
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+ 0x4a100900 0x100>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ interrupt-parent = <&intc>;
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+ /*
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+ * c0_rx_thresh_pend
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+ * c0_rx_pend
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+ * c0_tx_pend
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+ * c0_misc_pend
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+ */
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+ interrupts = <40 41 42 43>;
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+ ranges;
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+ syscon = <&scm_conf>;
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+
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+ davinci_mdio: mdio@4a100800 {
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+ compatible = "ti,davinci_mdio";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ ti,hwmods = "davinci_mdio";
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+ bus_freq = <1000000>;
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+ reg = <0x4a100800 0x100>;
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+ };
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+
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+ cpsw_emac0: slave@4a100200 {
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+ /* Filled in by U-Boot */
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+ mac-address = [ 00 00 00 00 00 00 ];
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+ };
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+
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+ cpsw_emac1: slave@4a100300 {
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+ /* Filled in by U-Boot */
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+ mac-address = [ 00 00 00 00 00 00 ];
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+ };
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+
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+ phy_sel: cpsw-phy-sel@0x48160650 {
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+ compatible = "ti,am3352-cpsw-phy-sel";
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+ reg= <0x48160650 0x4>;
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+ reg-names = "gmii-sel";
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+ };
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+ };
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+ };
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+};
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