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@@ -1155,7 +1155,6 @@ mlxsw_pci_config_profile_swid_config(struct mlxsw_pci *mlxsw_pci,
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mlxsw_cmd_mbox_config_profile_swid_config_mask_set(mbox, index, mask);
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}
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-#define MLXSW_RESOURCES_TABLE_END_ID 0xffff
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#define MLXSW_MAX_SPAN_ID 0x2420
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#define MLXSW_MAX_LAG_ID 0x2520
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#define MLXSW_MAX_PORTS_IN_LAG_ID 0x2521
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@@ -1167,8 +1166,6 @@ mlxsw_pci_config_profile_swid_config(struct mlxsw_pci *mlxsw_pci,
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#define MLXSW_MAX_VLAN_GROUPS_ID 0x2906
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#define MLXSW_MAX_REGIONS_ID 0x2901
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#define MLXSW_MAX_RIF_ID 0x2C02
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-#define MLXSW_RESOURCES_QUERY_MAX_QUERIES 100
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-#define MLXSW_RESOURCES_PER_QUERY 32
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static void mlxsw_pci_resources_query_parse(int id, u64 val,
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struct mlxsw_resources *resources)
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@@ -1238,16 +1235,17 @@ static int mlxsw_pci_resources_query(struct mlxsw_pci *mlxsw_pci, char *mbox,
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mlxsw_cmd_mbox_zero(mbox);
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- for (index = 0; index < MLXSW_RESOURCES_QUERY_MAX_QUERIES; index++) {
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+ for (index = 0; index < MLXSW_CMD_QUERY_RESOURCES_MAX_QUERIES;
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+ index++) {
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err = mlxsw_cmd_query_resources(mlxsw_pci->core, mbox, index);
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if (err)
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return err;
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- for (i = 0; i < MLXSW_RESOURCES_PER_QUERY; i++) {
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+ for (i = 0; i < MLXSW_CMD_QUERY_RESOURCES_PER_QUERY; i++) {
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id = mlxsw_cmd_mbox_query_resource_id_get(mbox, i);
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data = mlxsw_cmd_mbox_query_resource_data_get(mbox, i);
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- if (id == MLXSW_RESOURCES_TABLE_END_ID)
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+ if (id == MLXSW_CMD_QUERY_RESOURCES_TABLE_END_ID)
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return 0;
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mlxsw_pci_resources_query_parse(id, data, resources);
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