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@@ -293,6 +293,7 @@ int t4_wr_mbox_meat_timeout(struct adapter *adap, int mbox, const void *cmd,
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u32 data_reg = PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
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u32 ctl_reg = PF_REG(mbox, CIM_PF_MAILBOX_CTRL_A);
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__be64 cmd_rpl[MBOX_LEN / 8];
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+ u32 pcie_fw;
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if ((size & 15) || size > MBOX_LEN)
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return -EINVAL;
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@@ -331,7 +332,10 @@ int t4_wr_mbox_meat_timeout(struct adapter *adap, int mbox, const void *cmd,
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delay_idx = 0;
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ms = delay[0];
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- for (i = 0; i < timeout; i += ms) {
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+ for (i = 0;
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+ !((pcie_fw = t4_read_reg(adap, PCIE_FW_A)) & PCIE_FW_ERR_F) &&
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+ i < timeout;
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+ i += ms) {
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if (sleep_ok) {
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ms = delay[delay_idx]; /* last element may repeat */
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if (delay_idx < ARRAY_SIZE(delay) - 1)
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@@ -366,7 +370,7 @@ int t4_wr_mbox_meat_timeout(struct adapter *adap, int mbox, const void *cmd,
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}
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}
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- ret = -ETIMEDOUT;
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+ ret = (pcie_fw & PCIE_FW_ERR_F) ? -ENXIO : -ETIMEDOUT;
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t4_record_mbox(adap, cmd, MBOX_LEN, access, ret);
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dev_err(adap->pdev_dev, "command %#x in mailbox %d timed out\n",
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*(const u8 *)cmd, mbox);
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