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@@ -6624,10 +6624,10 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
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struct drm_device *dev = crtc->base.dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
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+ int clock_limit = dev_priv->max_dotclk_freq;
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- /* FIXME should check pixel clock limits on all platforms */
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if (INTEL_INFO(dev)->gen < 4) {
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- int clock_limit = dev_priv->max_cdclk_freq * 9 / 10;
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+ clock_limit = dev_priv->max_cdclk_freq * 9 / 10;
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/*
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* Enable double wide mode when the dot clock
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@@ -6635,16 +6635,16 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
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*/
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if (intel_crtc_supports_double_wide(crtc) &&
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adjusted_mode->crtc_clock > clock_limit) {
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- clock_limit *= 2;
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+ clock_limit = dev_priv->max_dotclk_freq;
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pipe_config->double_wide = true;
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}
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+ }
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- if (adjusted_mode->crtc_clock > clock_limit) {
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- DRM_DEBUG_KMS("requested pixel clock (%d kHz) too high (max: %d kHz, double wide: %s)\n",
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- adjusted_mode->crtc_clock, clock_limit,
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- yesno(pipe_config->double_wide));
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- return -EINVAL;
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- }
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+ if (adjusted_mode->crtc_clock > clock_limit) {
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+ DRM_DEBUG_KMS("requested pixel clock (%d kHz) too high (max: %d kHz, double wide: %s)\n",
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+ adjusted_mode->crtc_clock, clock_limit,
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+ yesno(pipe_config->double_wide));
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+ return -EINVAL;
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}
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/*
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