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@@ -34,13 +34,19 @@
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#define OV5640_DEFAULT_SLAVE_ID 0x3c
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+#define OV5640_REG_SYS_CTRL0 0x3008
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#define OV5640_REG_CHIP_ID 0x300a
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+#define OV5640_REG_IO_MIPI_CTRL00 0x300e
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+#define OV5640_REG_PAD_OUTPUT_ENABLE01 0x3017
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+#define OV5640_REG_PAD_OUTPUT_ENABLE02 0x3018
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#define OV5640_REG_PAD_OUTPUT00 0x3019
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+#define OV5640_REG_SYSTEM_CONTROL1 0x302e
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#define OV5640_REG_SC_PLL_CTRL0 0x3034
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#define OV5640_REG_SC_PLL_CTRL1 0x3035
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#define OV5640_REG_SC_PLL_CTRL2 0x3036
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#define OV5640_REG_SC_PLL_CTRL3 0x3037
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#define OV5640_REG_SLAVE_ID 0x3100
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+#define OV5640_REG_SCCB_SYS_CTRL1 0x3103
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#define OV5640_REG_SYS_ROOT_DIVIDER 0x3108
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#define OV5640_REG_AWB_R_GAIN 0x3400
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#define OV5640_REG_AWB_G_GAIN 0x3402
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@@ -70,6 +76,7 @@
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#define OV5640_REG_HZ5060_CTRL01 0x3c01
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#define OV5640_REG_SIGMADELTA_CTRL0C 0x3c0c
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#define OV5640_REG_FRAME_CTRL01 0x4202
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+#define OV5640_REG_POLARITY_CTRL00 0x4740
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#define OV5640_REG_MIPI_CTRL00 0x4800
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#define OV5640_REG_DEBUG_MODE 0x4814
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#define OV5640_REG_PRE_ISP_TEST_SET1 0x503d
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@@ -982,7 +989,111 @@ static int ov5640_get_gain(struct ov5640_dev *sensor)
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return gain & 0x3ff;
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}
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-static int ov5640_set_stream(struct ov5640_dev *sensor, bool on)
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+static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on)
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+{
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+ int ret;
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+ unsigned int flags = sensor->ep.bus.parallel.flags;
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+ u8 pclk_pol = 0;
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+ u8 hsync_pol = 0;
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+ u8 vsync_pol = 0;
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+
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+ /*
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+ * Note about parallel port configuration.
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+ *
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+ * When configured in parallel mode, the OV5640 will
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+ * output 10 bits data on DVP data lines [9:0].
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+ * If only 8 bits data are wanted, the 8 bits data lines
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+ * of the camera interface must be physically connected
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+ * on the DVP data lines [9:2].
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+ *
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+ * Control lines polarity can be configured through
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+ * devicetree endpoint control lines properties.
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+ * If no endpoint control lines properties are set,
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+ * polarity will be as below:
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+ * - VSYNC: active high
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+ * - HREF: active low
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+ * - PCLK: active low
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+ */
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+
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+ if (on) {
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+ /*
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+ * reset MIPI PCLK/SERCLK divider
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+ *
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+ * SC PLL CONTRL1 0
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+ * - [3..0]: MIPI PCLK/SERCLK divider
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+ */
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+ ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1, 0x0f, 0);
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+ if (ret)
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+ return ret;
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+
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+ /*
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+ * configure parallel port control lines polarity
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+ *
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+ * POLARITY CTRL0
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+ * - [5]: PCLK polarity (0: active low, 1: active high)
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+ * - [1]: HREF polarity (0: active low, 1: active high)
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+ * - [0]: VSYNC polarity (mismatch here between
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+ * datasheet and hardware, 0 is active high
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+ * and 1 is active low...)
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+ */
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+ if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
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+ pclk_pol = 1;
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+ if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
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+ hsync_pol = 1;
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+ if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
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+ vsync_pol = 1;
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+
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+ ret = ov5640_write_reg(sensor,
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+ OV5640_REG_POLARITY_CTRL00,
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+ (pclk_pol << 5) |
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+ (hsync_pol << 1) |
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+ vsync_pol);
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+
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+ if (ret)
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+ return ret;
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+ }
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+
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+ /*
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+ * powerdown MIPI TX/RX PHY & disable MIPI
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+ *
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+ * MIPI CONTROL 00
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+ * 4: PWDN PHY TX
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+ * 3: PWDN PHY RX
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+ * 2: MIPI enable
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+ */
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+ ret = ov5640_write_reg(sensor,
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+ OV5640_REG_IO_MIPI_CTRL00, on ? 0x18 : 0);
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+ if (ret)
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+ return ret;
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+
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+ /*
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+ * enable VSYNC/HREF/PCLK DVP control lines
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+ * & D[9:6] DVP data lines
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+ *
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+ * PAD OUTPUT ENABLE 01
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+ * - 6: VSYNC output enable
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+ * - 5: HREF output enable
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+ * - 4: PCLK output enable
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+ * - [3:0]: D[9:6] output enable
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+ */
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+ ret = ov5640_write_reg(sensor,
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+ OV5640_REG_PAD_OUTPUT_ENABLE01,
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+ on ? 0x7f : 0);
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+ if (ret)
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+ return ret;
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+
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+ /*
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+ * enable D[5:0] DVP data lines
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+ *
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+ * PAD OUTPUT ENABLE 02
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+ * - [7:2]: D[5:0] output enable
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+ */
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+ return ov5640_write_reg(sensor,
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+ OV5640_REG_PAD_OUTPUT_ENABLE02,
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+ on ? 0xfc : 0);
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+}
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+
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+static int ov5640_set_stream_mipi(struct ov5640_dev *sensor, bool on)
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{
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int ret;
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@@ -1604,17 +1715,19 @@ static int ov5640_set_power(struct ov5640_dev *sensor, bool on)
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if (ret)
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goto power_off;
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- /*
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- * start streaming briefly followed by stream off in
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- * order to coax the clock lane into LP-11 state.
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- */
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- ret = ov5640_set_stream(sensor, true);
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- if (ret)
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- goto power_off;
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- usleep_range(1000, 2000);
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- ret = ov5640_set_stream(sensor, false);
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- if (ret)
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- goto power_off;
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+ if (sensor->ep.bus_type == V4L2_MBUS_CSI2) {
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+ /*
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+ * start streaming briefly followed by stream off in
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+ * order to coax the clock lane into LP-11 state.
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+ */
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+ ret = ov5640_set_stream_mipi(sensor, true);
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+ if (ret)
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+ goto power_off;
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+ usleep_range(1000, 2000);
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+ ret = ov5640_set_stream_mipi(sensor, false);
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+ if (ret)
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+ goto power_off;
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+ }
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return 0;
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}
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@@ -2188,7 +2301,11 @@ static int ov5640_s_stream(struct v4l2_subdev *sd, int enable)
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goto out;
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}
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- ret = ov5640_set_stream(sensor, enable);
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+ if (sensor->ep.bus_type == V4L2_MBUS_CSI2)
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+ ret = ov5640_set_stream_mipi(sensor, enable);
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+ else
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+ ret = ov5640_set_stream_dvp(sensor, enable);
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+
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if (!ret)
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sensor->streaming = enable;
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}
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@@ -2301,11 +2418,6 @@ static int ov5640_probe(struct i2c_client *client,
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return ret;
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}
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- if (sensor->ep.bus_type != V4L2_MBUS_CSI2) {
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- dev_err(dev, "invalid bus type, must be MIPI CSI2\n");
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- return -EINVAL;
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- }
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-
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/* get system clock (xclk) */
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sensor->xclk = devm_clk_get(dev, "xclk");
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if (IS_ERR(sensor->xclk)) {
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