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@@ -36,6 +36,8 @@
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#include "trace.h"
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+#define KVM_HV_MAX_SPARSE_VCPU_SET_BITS DIV_ROUND_UP(KVM_MAX_VCPUS, 64)
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+
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static inline u64 synic_read_sint(struct kvm_vcpu_hv_synic *synic, int sint)
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{
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return atomic64_read(&synic->sint[sint]);
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@@ -1277,37 +1279,47 @@ int kvm_hv_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
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return kvm_hv_get_msr(vcpu, msr, pdata, host);
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}
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-static __always_inline bool hv_vcpu_in_sparse_set(struct kvm_vcpu_hv *hv_vcpu,
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- u64 sparse_banks[],
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- u64 valid_bank_mask)
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+static __always_inline unsigned long *sparse_set_to_vcpu_mask(
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+ struct kvm *kvm, u64 *sparse_banks, u64 valid_bank_mask,
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+ u64 *vp_bitmap, unsigned long *vcpu_bitmap)
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{
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- int bank = hv_vcpu->vp_index / 64, sbank;
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-
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- if (bank >= 64)
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- return false;
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+ struct kvm_hv *hv = &kvm->arch.hyperv;
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+ struct kvm_vcpu *vcpu;
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+ int i, bank, sbank = 0;
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- if (!(valid_bank_mask & BIT_ULL(bank)))
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- return false;
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+ memset(vp_bitmap, 0,
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+ KVM_HV_MAX_SPARSE_VCPU_SET_BITS * sizeof(*vp_bitmap));
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+ for_each_set_bit(bank, (unsigned long *)&valid_bank_mask,
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+ KVM_HV_MAX_SPARSE_VCPU_SET_BITS)
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+ vp_bitmap[bank] = sparse_banks[sbank++];
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- /* Sparse bank number equals to the number of set bits before it */
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- sbank = bitmap_weight((unsigned long *)&valid_bank_mask, bank);
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+ if (likely(!atomic_read(&hv->num_mismatched_vp_indexes))) {
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+ /* for all vcpus vp_index == vcpu_idx */
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+ return (unsigned long *)vp_bitmap;
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+ }
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- return !!(sparse_banks[sbank] & BIT_ULL(hv_vcpu->vp_index % 64));
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+ bitmap_zero(vcpu_bitmap, KVM_MAX_VCPUS);
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+ kvm_for_each_vcpu(i, vcpu, kvm) {
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+ if (test_bit(vcpu_to_hv_vcpu(vcpu)->vp_index,
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+ (unsigned long *)vp_bitmap))
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+ __set_bit(i, vcpu_bitmap);
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+ }
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+ return vcpu_bitmap;
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}
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static u64 kvm_hv_flush_tlb(struct kvm_vcpu *current_vcpu, u64 ingpa,
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u16 rep_cnt, bool ex)
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{
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struct kvm *kvm = current_vcpu->kvm;
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- struct kvm_hv *hv = &kvm->arch.hyperv;
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struct kvm_vcpu_hv *hv_vcpu = ¤t_vcpu->arch.hyperv;
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struct hv_tlb_flush_ex flush_ex;
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struct hv_tlb_flush flush;
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- struct kvm_vcpu *vcpu;
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- unsigned long vcpu_bitmap[BITS_TO_LONGS(KVM_MAX_VCPUS)] = {0};
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+ u64 vp_bitmap[KVM_HV_MAX_SPARSE_VCPU_SET_BITS];
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+ DECLARE_BITMAP(vcpu_bitmap, KVM_MAX_VCPUS);
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+ unsigned long *vcpu_mask;
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u64 valid_bank_mask;
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u64 sparse_banks[64];
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- int sparse_banks_len, i, bank, sbank;
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+ int sparse_banks_len;
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bool all_cpus;
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if (!ex) {
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@@ -1350,54 +1362,19 @@ static u64 kvm_hv_flush_tlb(struct kvm_vcpu *current_vcpu, u64 ingpa,
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return HV_STATUS_INVALID_HYPERCALL_INPUT;
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}
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- /*
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- * vcpu->arch.cr3 may not be up-to-date for running vCPUs so we can't
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- * analyze it here, flush TLB regardless of the specified address space.
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- */
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cpumask_clear(&hv_vcpu->tlb_flush);
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- if (all_cpus) {
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- kvm_make_vcpus_request_mask(kvm,
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- KVM_REQ_TLB_FLUSH | KVM_REQUEST_NO_WAKEUP,
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- NULL, &hv_vcpu->tlb_flush);
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- goto ret_success;
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- }
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-
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- if (atomic_read(&hv->num_mismatched_vp_indexes)) {
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- kvm_for_each_vcpu(i, vcpu, kvm) {
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- if (hv_vcpu_in_sparse_set(&vcpu->arch.hyperv,
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- sparse_banks,
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- valid_bank_mask))
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- __set_bit(i, vcpu_bitmap);
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- }
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- goto flush_request;
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- }
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+ vcpu_mask = all_cpus ? NULL :
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+ sparse_set_to_vcpu_mask(kvm, sparse_banks, valid_bank_mask,
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+ vp_bitmap, vcpu_bitmap);
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/*
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- * num_mismatched_vp_indexes is zero so every vcpu has
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- * vp_index == vcpu_idx.
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+ * vcpu->arch.cr3 may not be up-to-date for running vCPUs so we can't
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+ * analyze it here, flush TLB regardless of the specified address space.
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*/
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- sbank = 0;
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- for_each_set_bit(bank, (unsigned long *)&valid_bank_mask,
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- BITS_PER_LONG) {
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- for_each_set_bit(i,
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- (unsigned long *)&sparse_banks[sbank],
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- BITS_PER_LONG) {
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- u32 vp_index = bank * 64 + i;
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-
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- /* A non-existent vCPU was specified */
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- if (vp_index >= KVM_MAX_VCPUS)
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- return HV_STATUS_INVALID_HYPERCALL_INPUT;
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-
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- __set_bit(vp_index, vcpu_bitmap);
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- }
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- sbank++;
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- }
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-
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-flush_request:
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kvm_make_vcpus_request_mask(kvm,
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KVM_REQ_TLB_FLUSH | KVM_REQUEST_NO_WAKEUP,
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- vcpu_bitmap, &hv_vcpu->tlb_flush);
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+ vcpu_mask, &hv_vcpu->tlb_flush);
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ret_success:
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/* We always do full TLB flush, set rep_done = rep_cnt. */
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@@ -1405,18 +1382,38 @@ ret_success:
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((u64)rep_cnt << HV_HYPERCALL_REP_COMP_OFFSET);
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}
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+static void kvm_send_ipi_to_many(struct kvm *kvm, u32 vector,
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+ unsigned long *vcpu_bitmap)
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+{
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+ struct kvm_lapic_irq irq = {
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+ .delivery_mode = APIC_DM_FIXED,
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+ .vector = vector
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+ };
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+ struct kvm_vcpu *vcpu;
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+ int i;
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+
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+ kvm_for_each_vcpu(i, vcpu, kvm) {
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+ if (vcpu_bitmap && !test_bit(i, vcpu_bitmap))
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+ continue;
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+
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+ /* We fail only when APIC is disabled */
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+ kvm_apic_set_irq(vcpu, &irq, NULL);
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+ }
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+}
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+
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static u64 kvm_hv_send_ipi(struct kvm_vcpu *current_vcpu, u64 ingpa, u64 outgpa,
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bool ex, bool fast)
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{
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struct kvm *kvm = current_vcpu->kvm;
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- struct kvm_hv *hv = &kvm->arch.hyperv;
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struct hv_send_ipi_ex send_ipi_ex;
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struct hv_send_ipi send_ipi;
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- struct kvm_vcpu *vcpu;
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+ u64 vp_bitmap[KVM_HV_MAX_SPARSE_VCPU_SET_BITS];
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+ DECLARE_BITMAP(vcpu_bitmap, KVM_MAX_VCPUS);
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+ unsigned long *vcpu_mask;
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unsigned long valid_bank_mask;
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u64 sparse_banks[64];
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- int sparse_banks_len, bank, i, sbank;
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- struct kvm_lapic_irq irq = {.delivery_mode = APIC_DM_FIXED};
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+ int sparse_banks_len;
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+ u32 vector;
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bool all_cpus;
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if (!ex) {
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@@ -1425,18 +1422,18 @@ static u64 kvm_hv_send_ipi(struct kvm_vcpu *current_vcpu, u64 ingpa, u64 outgpa,
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sizeof(send_ipi))))
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return HV_STATUS_INVALID_HYPERCALL_INPUT;
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sparse_banks[0] = send_ipi.cpu_mask;
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- irq.vector = send_ipi.vector;
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+ vector = send_ipi.vector;
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} else {
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/* 'reserved' part of hv_send_ipi should be 0 */
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if (unlikely(ingpa >> 32 != 0))
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return HV_STATUS_INVALID_HYPERCALL_INPUT;
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sparse_banks[0] = outgpa;
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- irq.vector = (u32)ingpa;
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+ vector = (u32)ingpa;
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}
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all_cpus = false;
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valid_bank_mask = BIT_ULL(0);
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- trace_kvm_hv_send_ipi(irq.vector, sparse_banks[0]);
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+ trace_kvm_hv_send_ipi(vector, sparse_banks[0]);
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} else {
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if (unlikely(kvm_read_guest(kvm, ingpa, &send_ipi_ex,
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sizeof(send_ipi_ex))))
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@@ -1446,7 +1443,7 @@ static u64 kvm_hv_send_ipi(struct kvm_vcpu *current_vcpu, u64 ingpa, u64 outgpa,
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send_ipi_ex.vp_set.format,
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send_ipi_ex.vp_set.valid_bank_mask);
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- irq.vector = send_ipi_ex.vector;
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+ vector = send_ipi_ex.vector;
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valid_bank_mask = send_ipi_ex.vp_set.valid_bank_mask;
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sparse_banks_len = bitmap_weight(&valid_bank_mask, 64) *
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sizeof(sparse_banks[0]);
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@@ -1465,42 +1462,14 @@ static u64 kvm_hv_send_ipi(struct kvm_vcpu *current_vcpu, u64 ingpa, u64 outgpa,
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return HV_STATUS_INVALID_HYPERCALL_INPUT;
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}
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- if ((irq.vector < HV_IPI_LOW_VECTOR) ||
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- (irq.vector > HV_IPI_HIGH_VECTOR))
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+ if ((vector < HV_IPI_LOW_VECTOR) || (vector > HV_IPI_HIGH_VECTOR))
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return HV_STATUS_INVALID_HYPERCALL_INPUT;
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- if (all_cpus || atomic_read(&hv->num_mismatched_vp_indexes)) {
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- kvm_for_each_vcpu(i, vcpu, kvm) {
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- if (all_cpus || hv_vcpu_in_sparse_set(
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- &vcpu->arch.hyperv, sparse_banks,
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- valid_bank_mask)) {
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- /* We fail only when APIC is disabled */
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- kvm_apic_set_irq(vcpu, &irq, NULL);
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- }
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- }
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- goto ret_success;
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- }
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+ vcpu_mask = all_cpus ? NULL :
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+ sparse_set_to_vcpu_mask(kvm, sparse_banks, valid_bank_mask,
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+ vp_bitmap, vcpu_bitmap);
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- /*
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- * num_mismatched_vp_indexes is zero so every vcpu has
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- * vp_index == vcpu_idx.
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- */
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- sbank = 0;
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- for_each_set_bit(bank, (unsigned long *)&valid_bank_mask, 64) {
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- for_each_set_bit(i, (unsigned long *)&sparse_banks[sbank], 64) {
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- u32 vp_index = bank * 64 + i;
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- struct kvm_vcpu *vcpu =
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- get_vcpu_by_vpidx(kvm, vp_index);
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-
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- /* Unknown vCPU specified */
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- if (!vcpu)
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- continue;
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-
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- /* We fail only when APIC is disabled */
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- kvm_apic_set_irq(vcpu, &irq, NULL);
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- }
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- sbank++;
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- }
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+ kvm_send_ipi_to_many(kvm, vector, vcpu_mask);
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ret_success:
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return HV_STATUS_SUCCESS;
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