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@@ -1115,49 +1115,6 @@ int amdgpu_atombios_get_memory_pll_dividers(struct amdgpu_device *adev,
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return 0;
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}
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-uint32_t amdgpu_atombios_get_engine_clock(struct amdgpu_device *adev)
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-{
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- GET_ENGINE_CLOCK_PS_ALLOCATION args;
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- int index = GetIndexIntoMasterTable(COMMAND, GetEngineClock);
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-
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- amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args);
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- return le32_to_cpu(args.ulReturnEngineClock);
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-}
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-
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-uint32_t amdgpu_atombios_get_memory_clock(struct amdgpu_device *adev)
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-{
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- GET_MEMORY_CLOCK_PS_ALLOCATION args;
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- int index = GetIndexIntoMasterTable(COMMAND, GetMemoryClock);
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-
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- amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args);
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- return le32_to_cpu(args.ulReturnMemoryClock);
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-}
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-
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-void amdgpu_atombios_set_engine_clock(struct amdgpu_device *adev,
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- uint32_t eng_clock)
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-{
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- SET_ENGINE_CLOCK_PS_ALLOCATION args;
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- int index = GetIndexIntoMasterTable(COMMAND, SetEngineClock);
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-
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- args.ulTargetEngineClock = cpu_to_le32(eng_clock); /* 10 khz */
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-
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- amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args);
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-}
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-
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-void amdgpu_atombios_set_memory_clock(struct amdgpu_device *adev,
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- uint32_t mem_clock)
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-{
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- SET_MEMORY_CLOCK_PS_ALLOCATION args;
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- int index = GetIndexIntoMasterTable(COMMAND, SetMemoryClock);
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-
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- if (adev->flags & AMD_IS_APU)
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- return;
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-
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- args.ulTargetMemoryClock = cpu_to_le32(mem_clock); /* 10 khz */
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-
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- amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args);
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-}
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-
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void amdgpu_atombios_set_engine_dram_timings(struct amdgpu_device *adev,
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u32 eng_clock, u32 mem_clock)
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{
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@@ -1256,45 +1213,6 @@ int amdgpu_atombios_get_leakage_vddc_based_on_leakage_idx(struct amdgpu_device *
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return amdgpu_atombios_get_max_vddc(adev, VOLTAGE_TYPE_VDDC, leakage_idx, voltage);
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}
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-void amdgpu_atombios_set_voltage(struct amdgpu_device *adev,
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- u16 voltage_level,
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- u8 voltage_type)
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-{
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- union set_voltage args;
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- int index = GetIndexIntoMasterTable(COMMAND, SetVoltage);
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- u8 frev, crev, volt_index = voltage_level;
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-
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- if (!amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, index, &frev, &crev))
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- return;
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-
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- /* 0xff01 is a flag rather then an actual voltage */
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- if (voltage_level == 0xff01)
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- return;
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-
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- switch (crev) {
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- case 1:
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- args.v1.ucVoltageType = voltage_type;
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- args.v1.ucVoltageMode = SET_ASIC_VOLTAGE_MODE_ALL_SOURCE;
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- args.v1.ucVoltageIndex = volt_index;
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- break;
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- case 2:
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- args.v2.ucVoltageType = voltage_type;
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- args.v2.ucVoltageMode = SET_ASIC_VOLTAGE_MODE_SET_VOLTAGE;
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- args.v2.usVoltageLevel = cpu_to_le16(voltage_level);
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- break;
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- case 3:
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- args.v3.ucVoltageType = voltage_type;
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- args.v3.ucVoltageMode = ATOM_SET_VOLTAGE;
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- args.v3.usVoltageLevel = cpu_to_le16(voltage_level);
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- break;
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- default:
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- DRM_ERROR("Unknown table version %d, %d\n", frev, crev);
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- return;
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- }
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-
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- amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args);
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-}
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-
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int amdgpu_atombios_get_leakage_id_from_vbios(struct amdgpu_device *adev,
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u16 *leakage_id)
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{
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