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@@ -1,5 +1,5 @@
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/*
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/*
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- * Copyright (c) 2012-2015 Qualcomm Atheros, Inc.
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+ * Copyright (c) 2012-2016 Qualcomm Atheros, Inc.
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*
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* purpose with or without fee is hereby granted, provided that the above
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@@ -101,7 +101,7 @@ static void wil6210_mask_irq_misc(struct wil6210_priv *wil, bool mask_halp)
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mask_halp ? WIL6210_IRQ_DISABLE : WIL6210_IRQ_DISABLE_NO_HALP);
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mask_halp ? WIL6210_IRQ_DISABLE : WIL6210_IRQ_DISABLE_NO_HALP);
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}
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}
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-static void wil6210_mask_halp(struct wil6210_priv *wil)
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+void wil6210_mask_halp(struct wil6210_priv *wil)
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{
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{
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wil_dbg_irq(wil, "%s()\n", __func__);
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wil_dbg_irq(wil, "%s()\n", __func__);
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@@ -503,6 +503,13 @@ static int wil6210_debug_irq_mask(struct wil6210_priv *wil, u32 pseudo_cause)
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offsetof(struct RGF_ICR, ICR));
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offsetof(struct RGF_ICR, ICR));
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u32 imv_misc = wil_r(wil, RGF_DMA_EP_MISC_ICR +
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u32 imv_misc = wil_r(wil, RGF_DMA_EP_MISC_ICR +
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offsetof(struct RGF_ICR, IMV));
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offsetof(struct RGF_ICR, IMV));
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+
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+ /* HALP interrupt can be unmasked when misc interrupts are
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+ * masked
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+ */
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+ if (icr_misc & BIT_DMA_EP_MISC_ICR_HALP)
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+ return 0;
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+
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wil_err(wil, "IRQ when it should be masked: pseudo 0x%08x\n"
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wil_err(wil, "IRQ when it should be masked: pseudo 0x%08x\n"
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"Rx icm:icr:imv 0x%08x 0x%08x 0x%08x\n"
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"Rx icm:icr:imv 0x%08x 0x%08x 0x%08x\n"
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"Tx icm:icr:imv 0x%08x 0x%08x 0x%08x\n"
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"Tx icm:icr:imv 0x%08x 0x%08x 0x%08x\n"
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