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+This document describes the generic device tree binding for MSI controllers and
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+their master(s).
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+
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+Message Signaled Interrupts (MSIs) are a class of interrupts generated by a
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+write to an MMIO address.
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+
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+MSIs were originally specified by PCI (and are used with PCIe), but may also be
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+used with other busses, and hence a mechanism is required to relate devices on
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+those busses to the MSI controllers which they are capable of using,
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+potentially including additional information.
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+
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+MSIs are distinguished by some combination of:
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+
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+- The doorbell (the MMIO address written to).
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+
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+ Devices may be configured by software to write to arbitrary doorbells which
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+ they can address. An MSI controller may feature a number of doorbells.
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+
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+- The payload (the value written to the doorbell).
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+
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+ Devices may be configured to write an arbitrary payload chosen by software.
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+ MSI controllers may have restrictions on permitted payloads.
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+
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+- Sideband information accompanying the write.
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+
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+ Typically this is neither configurable nor probeable, and depends on the path
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+ taken through the memory system (i.e. it is a property of the combination of
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+ MSI controller and device rather than a property of either in isolation).
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+
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+
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+MSI controllers:
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+================
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+
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+An MSI controller signals interrupts to a CPU when a write is made to an MMIO
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+address by some master. An MSI controller may feature a number of doorbells.
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+
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+Required properties:
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+--------------------
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+
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+- msi-controller: Identifies the node as an MSI controller.
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+
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+Optional properties:
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+--------------------
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+
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+- #msi-cells: The number of cells in an msi-specifier, required if not zero.
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+
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+ Typically this will encode information related to sideband data, and will
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+ not encode doorbells or payloads as these can be configured dynamically.
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+
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+ The meaning of the msi-specifier is defined by the device tree binding of
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+ the specific MSI controller.
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+
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+
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+MSI clients
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+===========
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+
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+MSI clients are devices which generate MSIs. For each MSI they wish to
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+generate, the doorbell and payload may be configured, though sideband
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+information may not be configurable.
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+
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+Required properties:
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+--------------------
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+
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+- msi-parent: A list of phandle + msi-specifier pairs, one for each MSI
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+ controller which the device is capable of using.
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+
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+ This property is unordered, and MSIs may be allocated from any combination of
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+ MSI controllers listed in the msi-parent property.
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+
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+ If a device has restrictions on the allocation of MSIs, these restrictions
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+ must be described with additional properties.
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+
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+ When #msi-cells is non-zero, busses with an msi-parent will require
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+ additional properties to describe the relationship between devices on the bus
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+ and the set of MSIs they can potentially generate.
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+
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+
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+Example
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+=======
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+
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+/ {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ msi_a: msi-controller@a {
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+ reg = <0xa 0xf00>;
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+ compatible = "vendor-a,some-controller";
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+ msi-controller;
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+ /* No sideband data, so #msi-cells omitted */
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+ };
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+
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+ msi_b: msi-controller@b {
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+ reg = <0xb 0xf00>;
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+ compatible = "vendor-b,another-controller";
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+ msi-controller;
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+ /* Each device has some unique ID */
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+ #msi-cells = <1>;
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+ };
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+
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+ msi_c: msi-controller@c {
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+ reg = <0xb 0xf00>;
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+ compatible = "vendor-b,another-controller";
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+ msi-controller;
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+ /* Each device has some unique ID */
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+ #msi-cells = <1>;
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+ };
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+
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+ dev@0 {
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+ reg = <0x0 0xf00>;
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+ compatible = "vendor-c,some-device";
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+
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+ /* Can only generate MSIs to msi_a */
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+ msi-parent = <&msi_a>;
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+ };
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+
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+ dev@1 {
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+ reg = <0x1 0xf00>;
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+ compatible = "vendor-c,some-device";
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+
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+ /*
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+ * Can generate MSIs to either A or B.
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+ */
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+ msi-parent = <&msi_a>, <&msi_b 0x17>;
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+ };
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+
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+ dev@2 {
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+ reg = <0x2 0xf00>;
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+ compatible = "vendor-c,some-device";
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+ /*
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+ * Has different IDs at each MSI controller.
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+ * Can generate MSIs to all of the MSI controllers.
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+ */
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+ msi-parent = <&msi_a>, <&msi_b 0x17>, <&msi_c 0x53>;
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+ };
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+};
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