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@@ -236,11 +236,49 @@ static int pm8xxx_irq_set_type(struct irq_data *d, unsigned int flow_type)
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return pm8xxx_config_irq(chip, block, config);
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}
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+static int pm8xxx_irq_get_irqchip_state(struct irq_data *d,
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+ enum irqchip_irq_state which,
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+ bool *state)
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+{
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+ struct pm_irq_chip *chip = irq_data_get_irq_chip_data(d);
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+ unsigned int pmirq = irqd_to_hwirq(d);
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+ unsigned int bits;
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+ int irq_bit;
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+ u8 block;
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+ int rc;
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+
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+ if (which != IRQCHIP_STATE_LINE_LEVEL)
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+ return -EINVAL;
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+
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+ block = pmirq / 8;
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+ irq_bit = pmirq % 8;
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+
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+ spin_lock(&chip->pm_irq_lock);
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+ rc = regmap_write(chip->regmap, SSBI_REG_ADDR_IRQ_BLK_SEL, block);
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+ if (rc) {
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+ pr_err("Failed Selecting Block %d rc=%d\n", block, rc);
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+ goto bail;
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+ }
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+
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+ rc = regmap_read(chip->regmap, SSBI_REG_ADDR_IRQ_RT_STATUS, &bits);
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+ if (rc) {
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+ pr_err("Failed Reading Status rc=%d\n", rc);
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+ goto bail;
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+ }
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+
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+ *state = !!(bits & BIT(irq_bit));
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+bail:
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+ spin_unlock(&chip->pm_irq_lock);
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+
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+ return rc;
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+}
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+
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static struct irq_chip pm8xxx_irq_chip = {
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.name = "pm8xxx",
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.irq_mask_ack = pm8xxx_irq_mask_ack,
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.irq_unmask = pm8xxx_irq_unmask,
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.irq_set_type = pm8xxx_irq_set_type,
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+ .irq_get_irqchip_state = pm8xxx_irq_get_irqchip_state,
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.flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE,
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};
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