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@@ -169,9 +169,8 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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armada_drm_plane_work_cancel(dcrtc, &dplane->base);
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armada_drm_plane_work_cancel(dcrtc, &dplane->base);
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if (plane->fb != fb) {
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if (plane->fb != fb) {
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- struct armada_gem_object *obj = drm_fb_obj(fb);
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- uint32_t addr[3], pixel_format;
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- int i, num_planes, hsub;
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+ u32 addrs[3], pixel_format;
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+ int num_planes, hsub;
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/*
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/*
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* Take a reference on the new framebuffer - we want to
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* Take a reference on the new framebuffer - we want to
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@@ -185,6 +184,8 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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src_y = src.y1 >> 16;
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src_y = src.y1 >> 16;
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src_x = src.x1 >> 16;
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src_x = src.x1 >> 16;
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+ armada_drm_plane_calc_addrs(addrs, fb, src_x, src_y);
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+
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pixel_format = fb->pixel_format;
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pixel_format = fb->pixel_format;
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hsub = drm_format_horz_chroma_subsampling(pixel_format);
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hsub = drm_format_horz_chroma_subsampling(pixel_format);
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num_planes = drm_format_num_planes(pixel_format);
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num_planes = drm_format_num_planes(pixel_format);
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@@ -197,24 +198,17 @@ armada_ovl_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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if (src_x & (hsub - 1) && num_planes == 1)
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if (src_x & (hsub - 1) && num_planes == 1)
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ctrl0 ^= CFG_DMA_MOD(CFG_SWAPUV);
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ctrl0 ^= CFG_DMA_MOD(CFG_SWAPUV);
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- for (i = 0; i < num_planes; i++)
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- addr[i] = obj->dev_addr + fb->offsets[i] +
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- src_y * fb->pitches[i] +
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- src_x * drm_format_plane_cpp(pixel_format, i);
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- for (; i < ARRAY_SIZE(addr); i++)
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- addr[i] = 0;
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-
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- armada_reg_queue_set(dplane->vbl.regs, idx, addr[0],
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+ armada_reg_queue_set(dplane->vbl.regs, idx, addrs[0],
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LCD_SPU_DMA_START_ADDR_Y0);
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LCD_SPU_DMA_START_ADDR_Y0);
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- armada_reg_queue_set(dplane->vbl.regs, idx, addr[1],
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+ armada_reg_queue_set(dplane->vbl.regs, idx, addrs[1],
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LCD_SPU_DMA_START_ADDR_U0);
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LCD_SPU_DMA_START_ADDR_U0);
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- armada_reg_queue_set(dplane->vbl.regs, idx, addr[2],
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+ armada_reg_queue_set(dplane->vbl.regs, idx, addrs[2],
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LCD_SPU_DMA_START_ADDR_V0);
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LCD_SPU_DMA_START_ADDR_V0);
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- armada_reg_queue_set(dplane->vbl.regs, idx, addr[0],
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+ armada_reg_queue_set(dplane->vbl.regs, idx, addrs[0],
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LCD_SPU_DMA_START_ADDR_Y1);
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LCD_SPU_DMA_START_ADDR_Y1);
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- armada_reg_queue_set(dplane->vbl.regs, idx, addr[1],
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+ armada_reg_queue_set(dplane->vbl.regs, idx, addrs[1],
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LCD_SPU_DMA_START_ADDR_U1);
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LCD_SPU_DMA_START_ADDR_U1);
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- armada_reg_queue_set(dplane->vbl.regs, idx, addr[2],
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+ armada_reg_queue_set(dplane->vbl.regs, idx, addrs[2],
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LCD_SPU_DMA_START_ADDR_V1);
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LCD_SPU_DMA_START_ADDR_V1);
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val = fb->pitches[0] << 16 | fb->pitches[0];
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val = fb->pitches[0] << 16 | fb->pitches[0];
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