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drm/amd/include:cleanup vega10 nbio header files.

Cleanup asic_reg/vega10/NBIO folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Feifei Xu 7 years ago
parent
commit
f0a58aa3f2

+ 2 - 2
drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c

@@ -23,8 +23,8 @@
 
 #include "amdgpu.h"
 #include "vega10/soc15ip.h"
-#include "vega10/NBIO/nbio_6_1_offset.h"
-#include "vega10/NBIO/nbio_6_1_sh_mask.h"
+#include "nbio/nbio_6_1_offset.h"
+#include "nbio/nbio_6_1_sh_mask.h"
 #include "gc/gc_9_0_offset.h"
 #include "gc/gc_9_0_sh_mask.h"
 #include "soc15.h"

+ 3 - 3
drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c

@@ -25,9 +25,9 @@
 #include "nbio_v6_1.h"
 
 #include "vega10/soc15ip.h"
-#include "vega10/NBIO/nbio_6_1_default.h"
-#include "vega10/NBIO/nbio_6_1_offset.h"
-#include "vega10/NBIO/nbio_6_1_sh_mask.h"
+#include "nbio/nbio_6_1_default.h"
+#include "nbio/nbio_6_1_offset.h"
+#include "nbio/nbio_6_1_sh_mask.h"
 #include "vega10/vega10_enum.h"
 
 #define smnCPM_CONTROL                                                                                  0x11180460

+ 1 - 1
drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

@@ -36,7 +36,7 @@
 #include "mp/mp_9_0_sh_mask.h"
 #include "gc/gc_9_0_offset.h"
 #include "sdma0/sdma0_4_0_offset.h"
-#include "vega10/NBIO/nbio_6_1_offset.h"
+#include "nbio/nbio_6_1_offset.h"
 
 MODULE_FIRMWARE("amdgpu/vega10_sos.bin");
 MODULE_FIRMWARE("amdgpu/vega10_asd.bin");

+ 1 - 1
drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c

@@ -57,7 +57,7 @@
 #include "dce/dce_12_0_offset.h"
 #include "dce/dce_12_0_sh_mask.h"
 #include "vega10/soc15ip.h"
-#include "vega10/NBIO/nbio_6_1_offset.h"
+#include "nbio/nbio_6_1_offset.h"
 #include "reg_helper.h"
 
 #include "dce100/dce100_resource.h"

+ 0 - 0
drivers/gpu/drm/amd/include/asic_reg/vega10/NBIO/nbio_6_1_default.h → drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_default.h


+ 0 - 0
drivers/gpu/drm/amd/include/asic_reg/vega10/NBIO/nbio_6_1_offset.h → drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_offset.h


+ 0 - 0
drivers/gpu/drm/amd/include/asic_reg/vega10/NBIO/nbio_6_1_sh_mask.h → drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h


+ 3 - 3
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_inc.h

@@ -35,9 +35,9 @@
 #include "asic_reg/gc/gc_9_0_offset.h"
 #include "asic_reg/gc/gc_9_0_sh_mask.h"
 
-#include "asic_reg/vega10/NBIO/nbio_6_1_default.h"
-#include "asic_reg/vega10/NBIO/nbio_6_1_offset.h"
-#include "asic_reg/vega10/NBIO/nbio_6_1_sh_mask.h"
+#include "asic_reg/nbio/nbio_6_1_default.h"
+#include "asic_reg/nbio/nbio_6_1_offset.h"
+#include "asic_reg/nbio/nbio_6_1_sh_mask.h"
 
 
 #endif