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@@ -752,6 +752,7 @@ static int rmi_populate_f11(struct hid_device *hdev)
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bool has_rel;
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bool has_data40 = false;
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bool has_dribble = false;
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+ bool has_palm_detect = false;
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unsigned x_size, y_size;
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u16 query_offset;
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@@ -820,6 +821,7 @@ static int rmi_populate_f11(struct hid_device *hdev)
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ret);
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return ret;
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}
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+ has_palm_detect = !!(buf[0] & BIT(0));
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has_query10 = !!(buf[0] & BIT(2));
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query_offset += 2; /* query 7 and 8 are present */
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@@ -906,11 +908,11 @@ static int rmi_populate_f11(struct hid_device *hdev)
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* retrieve the ctrl registers
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* the ctrl register has a size of 20 but a fw bug split it into 16 + 4,
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* and there is no way to know if the first 20 bytes are here or not.
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- * We use only the first 10 bytes, so get only them.
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+ * We use only the first 12 bytes, so get only them.
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*/
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- ret = rmi_read_block(hdev, data->f11.control_base_addr, buf, 10);
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+ ret = rmi_read_block(hdev, data->f11.control_base_addr, buf, 12);
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if (ret) {
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- hid_err(hdev, "can not read ctrl block of size 10: %d.\n", ret);
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+ hid_err(hdev, "can not read ctrl block of size 11: %d.\n", ret);
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return ret;
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}
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@@ -927,6 +929,17 @@ static int rmi_populate_f11(struct hid_device *hdev)
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}
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}
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+ if (has_palm_detect) {
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+ buf[11] = buf[11] & ~BIT(0);
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+ ret = rmi_write(hdev, data->f11.control_base_addr + 11,
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+ &buf[11]);
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+ if (ret) {
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+ hid_err(hdev, "can not write to control reg 11: %d.\n",
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+ ret);
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+ return ret;
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+ }
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+ }
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+
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return 0;
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}
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