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@@ -42,6 +42,7 @@ static const struct renesas_sdhi_of_data of_rz_compatible = {
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static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = {
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static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = {
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.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL,
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.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
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+ .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
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};
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};
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/* Definitions for sampling clocks */
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/* Definitions for sampling clocks */
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@@ -61,6 +62,7 @@ static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = {
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TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
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TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
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MMC_CAP_CMD23,
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MMC_CAP_CMD23,
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+ .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
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.dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES,
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.dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES,
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.dma_rx_offset = 0x2000,
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.dma_rx_offset = 0x2000,
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.scc_offset = 0x0300,
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.scc_offset = 0x0300,
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@@ -81,6 +83,7 @@ static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
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TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
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TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
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MMC_CAP_CMD23,
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MMC_CAP_CMD23,
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+ .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
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.bus_shift = 2,
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.bus_shift = 2,
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.scc_offset = 0x1000,
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.scc_offset = 0x1000,
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.taps = rcar_gen3_scc_taps,
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.taps = rcar_gen3_scc_taps,
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