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[PATCH] x86_64: Some updates for boot-options.txt

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Andi Kleen 20 years ago
parent
commit
ef4d7cbea7
1 changed files with 6 additions and 4 deletions
  1. 6 4
      Documentation/x86_64/boot-options.txt

+ 6 - 4
Documentation/x86_64/boot-options.txt

@@ -47,7 +47,7 @@ Timing
   notsc
   notsc
   Don't use the CPU time stamp counter to read the wall time.
   Don't use the CPU time stamp counter to read the wall time.
   This can be used to work around timing problems on multiprocessor systems
   This can be used to work around timing problems on multiprocessor systems
-  with not properly synchronized CPUs. Only useful with a SMP kernel
+  with not properly synchronized CPUs.
 
 
   report_lost_ticks
   report_lost_ticks
   Report when timer interrupts are lost because some code turned off
   Report when timer interrupts are lost because some code turned off
@@ -74,6 +74,9 @@ Idle loop
   event. This will make the CPUs eat a lot more power, but may be useful
   event. This will make the CPUs eat a lot more power, but may be useful
   to get slightly better performance in multiprocessor benchmarks. It also
   to get slightly better performance in multiprocessor benchmarks. It also
   makes some profiling using performance counters more accurate.
   makes some profiling using performance counters more accurate.
+  Please note that on systems with MONITOR/MWAIT support (like Intel EM64T
+  CPUs) this option has no performance advantage over the normal idle loop.
+  It may also interact badly with hyperthreading.
 
 
 Rebooting
 Rebooting
 
 
@@ -178,6 +181,5 @@ Debugging
 Misc
 Misc
 
 
   noreplacement  Don't replace instructions with more appropiate ones
   noreplacement  Don't replace instructions with more appropiate ones
-  				 for the CPU. This may be useful on asymmetric MP systems
-				 where some CPU have less capabilities than the others.
-
+		 for the CPU. This may be useful on asymmetric MP systems
+		 where some CPU have less capabilities than the others.