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@@ -44,7 +44,7 @@
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#include <asm/unaligned.h>
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/*
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- * Superset of MCI IP registers integrated in Atmel AVR32 and AT91 Processors
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+ * Superset of MCI IP registers integrated in Atmel AT91 Processor
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* Registers and bitfields marked with [2] are only available in MCI2
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*/
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@@ -172,13 +172,6 @@
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#define atmci_writel(port, reg, value) \
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__raw_writel((value), (port)->regs + reg)
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-/* On AVR chips the Peripheral DMA Controller is not connected to MCI. */
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-#ifdef CONFIG_AVR32
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-# define ATMCI_PDC_CONNECTED 0
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-#else
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-# define ATMCI_PDC_CONNECTED 1
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-#endif
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-
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#define AUTOSUSPEND_DELAY 50
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#define ATMCI_DATA_ERROR_FLAGS (ATMCI_DCRCE | ATMCI_DTOE | ATMCI_OVRE | ATMCI_UNRE)
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@@ -1549,21 +1542,8 @@ static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd);
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break;
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default:
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- /*
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- * TODO: None of the currently available AVR32-based
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- * boards allow MMC power to be turned off. Implement
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- * power control when this can be tested properly.
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- *
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- * We also need to hook this into the clock management
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- * somehow so that newly inserted cards aren't
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- * subjected to a fast clock before we have a chance
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- * to figure out what the maximum rate is. Currently,
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- * there's no way to avoid this, and there never will
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- * be for boards that don't support power control.
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- */
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break;
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}
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-
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}
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static int atmci_get_ro(struct mmc_host *mmc)
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@@ -2464,7 +2444,7 @@ static void atmci_get_cap(struct atmel_mci *host)
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"version: 0x%x\n", version);
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host->caps.has_dma_conf_reg = 0;
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- host->caps.has_pdc = ATMCI_PDC_CONNECTED;
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+ host->caps.has_pdc = 1;
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host->caps.has_cfg_reg = 0;
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host->caps.has_cstor_reg = 0;
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host->caps.has_highspeed = 0;
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