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+/*
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+ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
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+ *
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+ * Permission is hereby granted, free of charge, to any person obtaining a
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+ * copy of this software and associated documentation files (the "Software"),
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+ * to deal in the Software without restriction, including without limitation
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+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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+ * and/or sell copies of the Software, and to permit persons to whom the
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+ * Software is furnished to do so, subject to the following conditions:
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+ *
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+ * The above copyright notice and this permission notice shall be included in
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+ * all copies or substantial portions of the Software.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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+ * DEALINGS IN THE SOFTWARE.
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+ */
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+
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+#ifdef __KERNEL__
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+#include <nouveau_platform.h>
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+#endif
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+#include <subdev/volt.h>
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+
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+struct cvb_coef {
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+ int c0;
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+ int c1;
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+ int c2;
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+ int c3;
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+ int c4;
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+ int c5;
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+};
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+
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+struct gk20a_volt_priv {
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+ struct nouveau_volt base;
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+ struct regulator *vdd;
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+};
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+
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+const struct cvb_coef gk20a_cvb_coef[] = {
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+ /* MHz, c0, c1, c2, c3, c4, c5 */
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+ /* 72 */ { 1209886, -36468, 515, 417, -13123, 203},
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+ /* 108 */ { 1130804, -27659, 296, 298, -10834, 221},
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+ /* 180 */ { 1162871, -27110, 247, 238, -10681, 268},
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+ /* 252 */ { 1220458, -28654, 247, 179, -10376, 298},
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+ /* 324 */ { 1280953, -30204, 247, 119, -9766, 304},
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+ /* 396 */ { 1344547, -31777, 247, 119, -8545, 292},
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+ /* 468 */ { 1420168, -34227, 269, 60, -7172, 256},
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+ /* 540 */ { 1490757, -35955, 274, 60, -5188, 197},
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+ /* 612 */ { 1599112, -42583, 398, 0, -1831, 119},
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+ /* 648 */ { 1366986, -16459, -274, 0, -3204, 72},
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+ /* 684 */ { 1391884, -17078, -274, -60, -1526, 30},
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+ /* 708 */ { 1415522, -17497, -274, -60, -458, 0},
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+ /* 756 */ { 1464061, -18331, -274, -119, 1831, -72},
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+ /* 804 */ { 1524225, -20064, -254, -119, 4272, -155},
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+ /* 852 */ { 1608418, -21643, -269, 0, 763, -48},
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+};
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+
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+/**
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+ * cvb_mv = ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0)
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+ */
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+static inline int
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+gk20a_volt_get_cvb_voltage(int speedo, int s_scale,
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+ const struct cvb_coef *coef)
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+{
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+ int mv;
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+
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+ mv = DIV_ROUND_CLOSEST(coef->c2 * speedo, s_scale);
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+ mv = DIV_ROUND_CLOSEST((mv + coef->c1) * speedo, s_scale) + coef->c0;
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+ return mv;
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+}
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+
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+/**
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+ * cvb_t_mv =
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+ * ((c2 * speedo / s_scale + c1) * speedo / s_scale + c0) +
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+ * ((c3 * speedo / s_scale + c4 + c5 * T / t_scale) * T / t_scale)
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+ */
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+static inline int
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+gk20a_volt_get_cvb_t_voltage(int speedo, int temp, int s_scale, int t_scale,
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+ const struct cvb_coef *coef)
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+{
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+ int cvb_mv, mv;
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+
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+ cvb_mv = gk20a_volt_get_cvb_voltage(speedo, s_scale, coef);
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+
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+ mv = DIV_ROUND_CLOSEST(coef->c3 * speedo, s_scale) + coef->c4 +
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+ DIV_ROUND_CLOSEST(coef->c5 * temp, t_scale);
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+ mv = DIV_ROUND_CLOSEST(mv * temp, t_scale) + cvb_mv;
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+ return mv;
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+}
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+
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+static int
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+gk20a_volt_calc_voltage(const struct cvb_coef *coef, int speedo)
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+{
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+ int mv;
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+
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+ mv = gk20a_volt_get_cvb_t_voltage(speedo, -10, 100, 10, coef);
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+ mv = DIV_ROUND_UP(mv, 1000);
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+
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+ return mv * 1000;
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+}
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+
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+static int
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+gk20a_volt_vid_get(struct nouveau_volt *volt)
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+{
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+ struct gk20a_volt_priv *priv = (void *)volt;
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+ int i, uv;
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+
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+ uv = regulator_get_voltage(priv->vdd);
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+
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+ for (i = 0; i < volt->vid_nr; i++)
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+ if (volt->vid[i].uv >= uv)
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+ return i;
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+
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+ return -EINVAL;
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+}
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+
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+static int
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+gk20a_volt_vid_set(struct nouveau_volt *volt, u8 vid)
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+{
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+ struct gk20a_volt_priv *priv = (void *)volt;
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+
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+ nv_debug(volt, "set voltage as %duv\n", volt->vid[vid].uv);
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+ return regulator_set_voltage(priv->vdd, volt->vid[vid].uv, 1200000);
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+}
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+
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+static int
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+gk20a_volt_set_id(struct nouveau_volt *volt, u8 id, int condition)
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+{
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+ struct gk20a_volt_priv *priv = (void *)volt;
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+ int prev_uv = regulator_get_voltage(priv->vdd);
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+ int target_uv = volt->vid[id].uv;
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+ int ret;
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+
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+ nv_debug(volt, "prev=%d, target=%d, condition=%d\n",
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+ prev_uv, target_uv, condition);
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+ if (!condition ||
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+ (condition < 0 && target_uv < prev_uv) ||
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+ (condition > 0 && target_uv > prev_uv)) {
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+ ret = gk20a_volt_vid_set(volt, volt->vid[id].vid);
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+ } else {
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+ ret = 0;
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+ }
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+
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+ return ret;
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+}
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+
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+static int
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+gk20a_volt_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
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+ struct nouveau_oclass *oclass, void *data, u32 size,
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+ struct nouveau_object **pobject)
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+{
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+ struct gk20a_volt_priv *priv;
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+ struct nouveau_volt *volt;
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+ struct nouveau_platform_device *plat;
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+ int i, ret, uv;
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+
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+ ret = nouveau_volt_create(parent, engine, oclass, &priv);
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+ *pobject = nv_object(priv);
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+ if (ret)
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+ return ret;
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+
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+ volt = &priv->base;
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+
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+ plat = nv_device_to_platform(nv_device(parent));
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+
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+ uv = regulator_get_voltage(plat->gpu->vdd);
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+ nv_info(priv, "The default voltage is %duV\n", uv);
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+
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+ priv->vdd = plat->gpu->vdd;
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+ priv->base.vid_get = gk20a_volt_vid_get;
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+ priv->base.vid_set = gk20a_volt_vid_set;
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+ priv->base.set_id = gk20a_volt_set_id;
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+
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+ volt->vid_nr = ARRAY_SIZE(gk20a_cvb_coef);
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+ nv_debug(priv, "%s - vid_nr = %d\n", __func__, volt->vid_nr);
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+ for (i = 0; i < volt->vid_nr; i++) {
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+ volt->vid[i].vid = i;
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+ volt->vid[i].uv = gk20a_volt_calc_voltage(&gk20a_cvb_coef[i],
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+ plat->gpu_speedo);
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+ nv_debug(priv, "%2d: vid=%d, uv=%d\n", i, volt->vid[i].vid,
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+ volt->vid[i].uv);
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+ }
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+
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+ return 0;
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+}
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+
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+struct nouveau_oclass
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+gk20a_volt_oclass = {
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+ .handle = NV_SUBDEV(VOLT, 0xea),
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+ .ofuncs = &(struct nouveau_ofuncs) {
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+ .ctor = gk20a_volt_ctor,
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+ .dtor = _nouveau_volt_dtor,
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+ .init = _nouveau_volt_init,
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+ .fini = _nouveau_volt_fini,
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+ },
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+};
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