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@@ -375,10 +375,9 @@ static const int pessimal_latency_ns = 5000;
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#define VLV_FIFO_START(dsparb, dsparb2, lo_shift, hi_shift) \
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((((dsparb) >> (lo_shift)) & 0xff) | ((((dsparb2) >> (hi_shift)) & 0x1) << 8))
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-static int vlv_get_fifo_size(struct drm_device *dev,
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+static int vlv_get_fifo_size(struct drm_i915_private *dev_priv,
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enum pipe pipe, int plane)
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{
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- struct drm_i915_private *dev_priv = to_i915(dev);
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int sprite0_start, sprite1_start, size;
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switch (pipe) {
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@@ -427,9 +426,8 @@ static int vlv_get_fifo_size(struct drm_device *dev,
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return size;
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}
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-static int i9xx_get_fifo_size(struct drm_device *dev, int plane)
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+static int i9xx_get_fifo_size(struct drm_i915_private *dev_priv, int plane)
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{
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- struct drm_i915_private *dev_priv = to_i915(dev);
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uint32_t dsparb = I915_READ(DSPARB);
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int size;
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@@ -443,9 +441,8 @@ static int i9xx_get_fifo_size(struct drm_device *dev, int plane)
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return size;
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}
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-static int i830_get_fifo_size(struct drm_device *dev, int plane)
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+static int i830_get_fifo_size(struct drm_i915_private *dev_priv, int plane)
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{
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- struct drm_i915_private *dev_priv = to_i915(dev);
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uint32_t dsparb = I915_READ(DSPARB);
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int size;
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@@ -460,9 +457,8 @@ static int i830_get_fifo_size(struct drm_device *dev, int plane)
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return size;
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}
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-static int i845_get_fifo_size(struct drm_device *dev, int plane)
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+static int i845_get_fifo_size(struct drm_i915_private *dev_priv, int plane)
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{
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- struct drm_i915_private *dev_priv = to_i915(dev);
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uint32_t dsparb = I915_READ(DSPARB);
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int size;
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@@ -1541,7 +1537,7 @@ static void i9xx_update_wm(struct intel_crtc *unused_crtc)
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else
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wm_info = &i830_a_wm_info;
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- fifo_size = dev_priv->display.get_fifo_size(dev, 0);
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+ fifo_size = dev_priv->display.get_fifo_size(dev_priv, 0);
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crtc = intel_get_crtc_for_plane(dev_priv, 0);
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if (intel_crtc_active(crtc)) {
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const struct drm_display_mode *adjusted_mode =
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@@ -1568,7 +1564,7 @@ static void i9xx_update_wm(struct intel_crtc *unused_crtc)
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if (IS_GEN2(dev_priv))
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wm_info = &i830_bc_wm_info;
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- fifo_size = dev_priv->display.get_fifo_size(dev, 1);
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+ fifo_size = dev_priv->display.get_fifo_size(dev_priv, 1);
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crtc = intel_get_crtc_for_plane(dev_priv, 1);
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if (intel_crtc_active(crtc)) {
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const struct drm_display_mode *adjusted_mode =
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@@ -1686,7 +1682,7 @@ static void i845_update_wm(struct intel_crtc *unused_crtc)
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adjusted_mode = &crtc->config->base.adjusted_mode;
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planea_wm = intel_calculate_wm(adjusted_mode->crtc_clock,
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&i845_wm_info,
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- dev_priv->display.get_fifo_size(dev, 0),
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+ dev_priv->display.get_fifo_size(dev_priv, 0),
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4, pessimal_latency_ns);
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fwater_lo = I915_READ(FW_BLC) & ~0xfff;
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fwater_lo |= (3<<8) | planea_wm;
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@@ -4556,11 +4552,11 @@ void vlv_wm_get_hw_state(struct drm_device *dev)
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plane->wm.fifo_size = 63;
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break;
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case DRM_PLANE_TYPE_PRIMARY:
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- plane->wm.fifo_size = vlv_get_fifo_size(dev, plane->pipe, 0);
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+ plane->wm.fifo_size = vlv_get_fifo_size(dev_priv, plane->pipe, 0);
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break;
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case DRM_PLANE_TYPE_OVERLAY:
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sprite = plane->plane;
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- plane->wm.fifo_size = vlv_get_fifo_size(dev, plane->pipe, sprite + 1);
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+ plane->wm.fifo_size = vlv_get_fifo_size(dev_priv, plane->pipe, sprite + 1);
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break;
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}
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}
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