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@@ -1354,7 +1354,6 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
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ecc->mode = NAND_ECC_HW;
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ecc->size = 512;
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ecc->strength = 1;
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- return 1;
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} else if (strength == 1 && ecc_stepsize == 512 && page_size == 512) {
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info->chunk_size = 512;
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@@ -1363,7 +1362,6 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
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ecc->mode = NAND_ECC_HW;
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ecc->size = 512;
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ecc->strength = 1;
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- return 1;
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/*
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* Required ECC: 4-bit correction per 512 bytes
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@@ -1378,7 +1376,6 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
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ecc->size = info->chunk_size;
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ecc->layout = &ecc_layout_2KB_bch4bit;
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ecc->strength = 16;
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- return 1;
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} else if (strength == 4 && ecc_stepsize == 512 && page_size == 4096) {
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info->ecc_bch = 1;
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@@ -1389,7 +1386,6 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
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ecc->size = info->chunk_size;
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ecc->layout = &ecc_layout_4KB_bch4bit;
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ecc->strength = 16;
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- return 1;
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/*
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* Required ECC: 8-bit correction per 512 bytes
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@@ -1404,8 +1400,15 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
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ecc->size = info->chunk_size;
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ecc->layout = &ecc_layout_4KB_bch8bit;
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ecc->strength = 16;
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- return 1;
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+ } else {
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+ dev_err(&info->pdev->dev,
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+ "ECC strength %d at page size %d is not supported\n",
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+ strength, page_size);
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+ return -ENODEV;
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}
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+
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+ dev_info(&info->pdev->dev, "ECC strength %d, ECC step size %d\n",
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+ ecc->strength, ecc->size);
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return 0;
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}
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@@ -1527,12 +1530,8 @@ KEEP_CONFIG:
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ret = pxa_ecc_init(info, &chip->ecc, ecc_strength,
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ecc_step, mtd->writesize);
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- if (!ret) {
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- dev_err(&info->pdev->dev,
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- "ECC strength %d at page size %d is not supported\n",
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- ecc_strength, mtd->writesize);
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- return -ENODEV;
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- }
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+ if (ret)
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+ return ret;
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/* calculate addressing information */
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if (mtd->writesize >= 2048)
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