|
@@ -115,7 +115,11 @@ ENTRY(printascii)
|
|
mov r1, r0
|
|
mov r1, r0
|
|
mov r0, #0x04 @ SYS_WRITE0
|
|
mov r0, #0x04 @ SYS_WRITE0
|
|
ARM( svc #0x123456 )
|
|
ARM( svc #0x123456 )
|
|
|
|
+#ifdef CONFIG_CPU_V7M
|
|
|
|
+ THUMB( bkpt #0xab )
|
|
|
|
+#else
|
|
THUMB( svc #0xab )
|
|
THUMB( svc #0xab )
|
|
|
|
+#endif
|
|
ret lr
|
|
ret lr
|
|
ENDPROC(printascii)
|
|
ENDPROC(printascii)
|
|
|
|
|
|
@@ -124,7 +128,11 @@ ENTRY(printch)
|
|
strb r0, [r1]
|
|
strb r0, [r1]
|
|
mov r0, #0x03 @ SYS_WRITEC
|
|
mov r0, #0x03 @ SYS_WRITEC
|
|
ARM( svc #0x123456 )
|
|
ARM( svc #0x123456 )
|
|
|
|
+#ifdef CONFIG_CPU_V7M
|
|
|
|
+ THUMB( bkpt #0xab )
|
|
|
|
+#else
|
|
THUMB( svc #0xab )
|
|
THUMB( svc #0xab )
|
|
|
|
+#endif
|
|
ret lr
|
|
ret lr
|
|
ENDPROC(printch)
|
|
ENDPROC(printch)
|
|
|
|
|