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crypto: inside-secure - optimize DSE bufferability control

Configure the data write bufferability to always buffer packets in the
DSE. This change slightly improves performance.

Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Igal Liberman 8 years ago
parent
c87925bfd2
commit
ee1fd870ee
2 changed files with 2 additions and 0 deletions
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  1. 1 0
      drivers/crypto/inside-secure/safexcel.c
  2. 1 0
      drivers/crypto/inside-secure/safexcel.h

+ 1 - 0
drivers/crypto/inside-secure/safexcel.c
View File 

@@ -329,6 +329,7 @@ static int safexcel_hw_init(struct safexcel_crypto_priv *priv)
 
 	val = EIP197_HIA_DSE_CFG_DIS_DEBUG;
 
 	val |= EIP197_HIA_DxE_CFG_MIN_DATA_SIZE(7) | EIP197_HIA_DxE_CFG_MAX_DATA_SIZE(8);
 
 	val |= EIP197_HIA_DxE_CFG_DATA_CACHE_CTRL(WR_CACHE_3BITS);
 
+	val |= EIP197_HIA_DSE_CFG_ALLWAYS_BUFFERABLE;
 
 	val |= EIP197_HIA_DSE_CFG_EN_SINGLE_WR;
 
 	writel(val, priv->base + EIP197_HIA_DSE_CFG);

+ 1 - 0
drivers/crypto/inside-secure/safexcel.h
View File 

@@ -139,6 +139,7 @@
 
 #define EIP197_HIA_DxE_CFG_MIN_DATA_SIZE(n)	((n) << 0)
 
 #define EIP197_HIA_DxE_CFG_DATA_CACHE_CTRL(n)	(((n) & 0x7) << 4)
 
 #define EIP197_HIA_DxE_CFG_MAX_DATA_SIZE(n)	((n) << 8)
 
+#define EIP197_HIA_DSE_CFG_ALLWAYS_BUFFERABLE	GENMASK(15, 14)
 
 #define EIP197_HIA_DxE_CFG_MIN_CTRL_SIZE(n)	((n) << 16)
 
 #define EIP197_HIA_DxE_CFG_CTRL_CACHE_CTRL(n)	(((n) & 0x7) << 20)
 
 #define EIP197_HIA_DxE_CFG_MAX_CTRL_SIZE(n)	((n) << 24)