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@@ -212,9 +212,22 @@ static int aspeed_clk_is_enabled(struct clk_hw *hw)
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{
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{
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struct aspeed_clk_gate *gate = to_aspeed_clk_gate(hw);
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struct aspeed_clk_gate *gate = to_aspeed_clk_gate(hw);
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u32 clk = BIT(gate->clock_idx);
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u32 clk = BIT(gate->clock_idx);
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+ u32 rst = BIT(gate->reset_idx);
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u32 enval = (gate->flags & CLK_GATE_SET_TO_DISABLE) ? 0 : clk;
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u32 enval = (gate->flags & CLK_GATE_SET_TO_DISABLE) ? 0 : clk;
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u32 reg;
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u32 reg;
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+ /*
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+ * If the IP is in reset, treat the clock as not enabled,
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+ * this happens with some clocks such as the USB one when
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+ * coming from cold reset. Without this, aspeed_clk_enable()
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+ * will fail to lift the reset.
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+ */
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+ if (gate->reset_idx >= 0) {
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+ regmap_read(gate->map, ASPEED_RESET_CTRL, ®);
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+ if (reg & rst)
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+ return 0;
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+ }
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+
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regmap_read(gate->map, ASPEED_CLK_STOP_CTRL, ®);
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regmap_read(gate->map, ASPEED_CLK_STOP_CTRL, ®);
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return ((reg & clk) == enval) ? 1 : 0;
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return ((reg & clk) == enval) ? 1 : 0;
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