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@@ -705,9 +705,15 @@ static int cvmx_usb_shutdown(struct cvmx_usb_state *usb)
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static int cvmx_usb_initialize(struct device *dev,
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struct cvmx_usb_state *usb)
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{
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+ int channel;
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+ int divisor;
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int retries = 0;
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+ union cvmx_usbcx_hcfg usbcx_hcfg;
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union cvmx_usbnx_clk_ctl usbn_clk_ctl;
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union cvmx_usbcx_gintsts usbc_gintsts;
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+ union cvmx_usbcx_gahbcfg usbcx_gahbcfg;
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+ union cvmx_usbcx_gintmsk usbcx_gintmsk;
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+ union cvmx_usbcx_gusbcfg usbcx_gusbcfg;
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union cvmx_usbnx_usbp_ctl_status usbn_usbp_ctl_status;
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retry:
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@@ -775,15 +781,14 @@ retry:
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* setting USBN0/1_CLK_CTL[ENABLE] = 1. Divide the core clock down
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* such that USB is as close as possible to 125Mhz
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*/
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- {
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- int divisor = DIV_ROUND_UP(octeon_get_clock_rate(), 125000000);
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- /* Lower than 4 doesn't seem to work properly */
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- if (divisor < 4)
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- divisor = 4;
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- usbn_clk_ctl.s.divide = divisor;
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- usbn_clk_ctl.s.divide2 = 0;
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- }
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+ divisor = DIV_ROUND_UP(octeon_get_clock_rate(), 125000000);
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+ /* Lower than 4 doesn't seem to work properly */
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+ if (divisor < 4)
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+ divisor = 4;
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+ usbn_clk_ctl.s.divide = divisor;
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+ usbn_clk_ctl.s.divide2 = 0;
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cvmx_write64_uint64(CVMX_USBNX_CLK_CTL(usb->index), usbn_clk_ctl.u64);
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+
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/* 2d. Write USBN0/1_CLK_CTL[HCLK_RST] = 1 */
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usbn_clk_ctl.s.hclk_rst = 1;
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cvmx_write64_uint64(CVMX_USBNX_CLK_CTL(usb->index), usbn_clk_ctl.u64);
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@@ -862,18 +867,16 @@ retry:
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* USBC_GAHBCFG[PTXFEMPLVL]
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* Global interrupt mask, USBC_GAHBCFG[GLBLINTRMSK] = 1
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*/
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- {
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- union cvmx_usbcx_gahbcfg usbcx_gahbcfg;
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- usbcx_gahbcfg.u32 = 0;
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- usbcx_gahbcfg.s.dmaen = !(usb->init_flags &
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- CVMX_USB_INITIALIZE_FLAGS_NO_DMA);
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- usbcx_gahbcfg.s.hbstlen = 0;
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- usbcx_gahbcfg.s.nptxfemplvl = 1;
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- usbcx_gahbcfg.s.ptxfemplvl = 1;
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- usbcx_gahbcfg.s.glblintrmsk = 1;
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- cvmx_usb_write_csr32(usb, CVMX_USBCX_GAHBCFG(usb->index),
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- usbcx_gahbcfg.u32);
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- }
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+ usbcx_gahbcfg.u32 = 0;
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+ usbcx_gahbcfg.s.dmaen = !(usb->init_flags &
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+ CVMX_USB_INITIALIZE_FLAGS_NO_DMA);
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+ usbcx_gahbcfg.s.hbstlen = 0;
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+ usbcx_gahbcfg.s.nptxfemplvl = 1;
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+ usbcx_gahbcfg.s.ptxfemplvl = 1;
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+ usbcx_gahbcfg.s.glblintrmsk = 1;
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+ cvmx_usb_write_csr32(usb, CVMX_USBCX_GAHBCFG(usb->index),
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+ usbcx_gahbcfg.u32);
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+
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/*
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* 3. Program the following fields in USBC_GUSBCFG register.
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* HS/FS timeout calibration, USBC_GUSBCFG[TOUTCAL] = 0
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@@ -881,79 +884,60 @@ retry:
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* USB turnaround time, USBC_GUSBCFG[USBTRDTIM] = 0x5
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* PHY low-power clock select, USBC_GUSBCFG[PHYLPWRCLKSEL] = 0
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*/
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- {
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- union cvmx_usbcx_gusbcfg usbcx_gusbcfg;
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-
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- usbcx_gusbcfg.u32 = cvmx_usb_read_csr32(usb,
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- CVMX_USBCX_GUSBCFG(usb->index));
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- usbcx_gusbcfg.s.toutcal = 0;
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- usbcx_gusbcfg.s.ddrsel = 0;
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- usbcx_gusbcfg.s.usbtrdtim = 0x5;
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- usbcx_gusbcfg.s.phylpwrclksel = 0;
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- cvmx_usb_write_csr32(usb, CVMX_USBCX_GUSBCFG(usb->index),
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- usbcx_gusbcfg.u32);
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- }
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+ usbcx_gusbcfg.u32 = cvmx_usb_read_csr32(usb,
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+ CVMX_USBCX_GUSBCFG(usb->index));
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+ usbcx_gusbcfg.s.toutcal = 0;
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+ usbcx_gusbcfg.s.ddrsel = 0;
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+ usbcx_gusbcfg.s.usbtrdtim = 0x5;
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+ usbcx_gusbcfg.s.phylpwrclksel = 0;
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+ cvmx_usb_write_csr32(usb, CVMX_USBCX_GUSBCFG(usb->index),
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+ usbcx_gusbcfg.u32);
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+
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/*
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* 4. The software must unmask the following bits in the USBC_GINTMSK
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* register.
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* OTG interrupt mask, USBC_GINTMSK[OTGINTMSK] = 1
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* Mode mismatch interrupt mask, USBC_GINTMSK[MODEMISMSK] = 1
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*/
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- {
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- union cvmx_usbcx_gintmsk usbcx_gintmsk;
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- int channel;
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-
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- usbcx_gintmsk.u32 = cvmx_usb_read_csr32(usb,
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- CVMX_USBCX_GINTMSK(usb->index));
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- usbcx_gintmsk.s.otgintmsk = 1;
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- usbcx_gintmsk.s.modemismsk = 1;
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- usbcx_gintmsk.s.hchintmsk = 1;
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- usbcx_gintmsk.s.sofmsk = 0;
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- /* We need RX FIFO interrupts if we don't have DMA */
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- if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
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- usbcx_gintmsk.s.rxflvlmsk = 1;
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- cvmx_usb_write_csr32(usb, CVMX_USBCX_GINTMSK(usb->index),
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- usbcx_gintmsk.u32);
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+ usbcx_gintmsk.u32 = cvmx_usb_read_csr32(usb,
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+ CVMX_USBCX_GINTMSK(usb->index));
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+ usbcx_gintmsk.s.otgintmsk = 1;
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+ usbcx_gintmsk.s.modemismsk = 1;
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+ usbcx_gintmsk.s.hchintmsk = 1;
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+ usbcx_gintmsk.s.sofmsk = 0;
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+ /* We need RX FIFO interrupts if we don't have DMA */
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+ if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
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+ usbcx_gintmsk.s.rxflvlmsk = 1;
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+ cvmx_usb_write_csr32(usb, CVMX_USBCX_GINTMSK(usb->index),
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+ usbcx_gintmsk.u32);
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- /*
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- * Disable all channel interrupts. We'll enable them per channel
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- * later.
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- */
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- for (channel = 0; channel < 8; channel++)
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- cvmx_usb_write_csr32(usb,
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- CVMX_USBCX_HCINTMSKX(channel, usb->index), 0);
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- }
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+ /*
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+ * Disable all channel interrupts. We'll enable them per channel later.
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+ */
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+ for (channel = 0; channel < 8; channel++)
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+ cvmx_usb_write_csr32(usb,
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+ CVMX_USBCX_HCINTMSKX(channel, usb->index),
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+ 0);
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- {
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- /*
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- * Host Port Initialization
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- *
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- * 1. Program the host-port interrupt-mask field to unmask,
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- * USBC_GINTMSK[PRTINT] = 1
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- */
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- USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index),
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- union cvmx_usbcx_gintmsk, prtintmsk, 1);
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- USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index),
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- union cvmx_usbcx_gintmsk, disconnintmsk, 1);
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- /*
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- * 2. Program the USBC_HCFG register to select full-speed host
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- * or high-speed host.
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- */
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- {
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- union cvmx_usbcx_hcfg usbcx_hcfg;
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-
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- usbcx_hcfg.u32 = cvmx_usb_read_csr32(usb,
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- CVMX_USBCX_HCFG(usb->index));
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- usbcx_hcfg.s.fslssupp = 0;
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- usbcx_hcfg.s.fslspclksel = 0;
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- cvmx_usb_write_csr32(usb, CVMX_USBCX_HCFG(usb->index),
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- usbcx_hcfg.u32);
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- }
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+ /*
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+ * Host Port Initialization
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+ *
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+ * 1. Program the host-port interrupt-mask field to unmask,
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+ * USBC_GINTMSK[PRTINT] = 1
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+ */
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+ USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index),
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+ union cvmx_usbcx_gintmsk, prtintmsk, 1);
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+ USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index),
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+ union cvmx_usbcx_gintmsk, disconnintmsk, 1);
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- /*
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- * Steps 4-15 from the manual are done later in the port enable
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- */
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- }
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+ /*
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+ * 2. Program the USBC_HCFG register to select full-speed host
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+ * or high-speed host.
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+ */
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+ usbcx_hcfg.u32 = cvmx_usb_read_csr32(usb, CVMX_USBCX_HCFG(usb->index));
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+ usbcx_hcfg.s.fslssupp = 0;
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+ usbcx_hcfg.s.fslspclksel = 0;
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+ cvmx_usb_write_csr32(usb, CVMX_USBCX_HCFG(usb->index), usbcx_hcfg.u32);
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cvmx_fifo_setup(usb);
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