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@@ -4815,6 +4815,20 @@ static int gfx_v8_0_mqd_init(struct amdgpu_ring *ring)
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tmp = REG_SET_FIELD(tmp, CP_HQD_PERSISTENT_STATE, PRELOAD_SIZE, 0x53);
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mqd->cp_hqd_persistent_state = tmp;
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+ /* set MTYPE */
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+ tmp = RREG32(mmCP_HQD_IB_CONTROL);
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+ tmp = REG_SET_FIELD(tmp, CP_HQD_IB_CONTROL, MIN_IB_AVAIL_SIZE, 3);
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+ tmp = REG_SET_FIELD(tmp, CP_HQD_IB_CONTROL, MTYPE, 3);
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+ mqd->cp_hqd_ib_control = tmp;
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+
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+ tmp = RREG32(mmCP_HQD_IQ_TIMER);
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+ tmp = REG_SET_FIELD(tmp, CP_HQD_IQ_TIMER, MTYPE, 3);
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+ mqd->cp_hqd_iq_timer = tmp;
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+
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+ tmp = RREG32(mmCP_HQD_CTX_SAVE_CONTROL);
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+ tmp = REG_SET_FIELD(tmp, CP_HQD_CTX_SAVE_CONTROL, MTYPE, 3);
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+ mqd->cp_hqd_ctx_save_control = tmp;
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+
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/* activate the queue */
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mqd->cp_hqd_active = 1;
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