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@@ -54,6 +54,13 @@
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#define SECTION_SIZE (_AC(1, UL) << SECTION_SHIFT)
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#define SECTION_MASK (~(SECTION_SIZE-1))
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+/*
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+ * Contiguous page definitions.
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+ */
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+#define CONT_PTES (_AC(1, UL) << CONT_SHIFT)
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+/* the the numerical offset of the PTE within a range of CONT_PTES */
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+#define CONT_RANGE_OFFSET(addr) (((addr)>>PAGE_SHIFT)&(CONT_PTES-1))
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+
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/*
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* Hardware page table definitions.
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*
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@@ -83,6 +90,7 @@
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#define PMD_SECT_S (_AT(pmdval_t, 3) << 8)
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#define PMD_SECT_AF (_AT(pmdval_t, 1) << 10)
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#define PMD_SECT_NG (_AT(pmdval_t, 1) << 11)
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+#define PMD_SECT_CONT (_AT(pmdval_t, 1) << 52)
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#define PMD_SECT_PXN (_AT(pmdval_t, 1) << 53)
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#define PMD_SECT_UXN (_AT(pmdval_t, 1) << 54)
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@@ -105,6 +113,7 @@
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#define PTE_AF (_AT(pteval_t, 1) << 10) /* Access Flag */
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#define PTE_NG (_AT(pteval_t, 1) << 11) /* nG */
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#define PTE_DBM (_AT(pteval_t, 1) << 51) /* Dirty Bit Management */
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+#define PTE_CONT (_AT(pteval_t, 1) << 52) /* Contiguous range */
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#define PTE_PXN (_AT(pteval_t, 1) << 53) /* Privileged XN */
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#define PTE_UXN (_AT(pteval_t, 1) << 54) /* User XN */
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