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@@ -204,7 +204,21 @@ static int rockchip_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
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regmap_update_bits(i2s->regmap, I2S_CKR, mask, val);
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- mask = I2S_TXCR_IBM_MASK;
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+ mask = I2S_CKR_CKP_MASK;
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+ switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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+ case SND_SOC_DAIFMT_NB_NF:
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+ val = I2S_CKR_CKP_NEG;
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+ break;
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+ case SND_SOC_DAIFMT_IB_NF:
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+ val = I2S_CKR_CKP_POS;
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+ break;
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+ default:
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+ return -EINVAL;
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+ }
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+
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+ regmap_update_bits(i2s->regmap, I2S_CKR, mask, val);
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+
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+ mask = I2S_TXCR_IBM_MASK | I2S_TXCR_TFS_MASK | I2S_TXCR_PBM_MASK;
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_RIGHT_J:
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val = I2S_TXCR_IBM_RSJM;
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@@ -215,13 +229,19 @@ static int rockchip_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
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case SND_SOC_DAIFMT_I2S:
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val = I2S_TXCR_IBM_NORMAL;
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break;
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+ case SND_SOC_DAIFMT_DSP_A: /* PCM no delay mode */
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+ val = I2S_TXCR_TFS_PCM;
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+ break;
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+ case SND_SOC_DAIFMT_DSP_B: /* PCM delay 1 mode */
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+ val = I2S_TXCR_TFS_PCM | I2S_TXCR_PBM_MODE(1);
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+ break;
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default:
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return -EINVAL;
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}
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regmap_update_bits(i2s->regmap, I2S_TXCR, mask, val);
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- mask = I2S_RXCR_IBM_MASK;
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+ mask = I2S_RXCR_IBM_MASK | I2S_RXCR_TFS_MASK | I2S_RXCR_PBM_MASK;
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_RIGHT_J:
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val = I2S_RXCR_IBM_RSJM;
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@@ -232,6 +252,12 @@ static int rockchip_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
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case SND_SOC_DAIFMT_I2S:
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val = I2S_RXCR_IBM_NORMAL;
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break;
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+ case SND_SOC_DAIFMT_DSP_A: /* PCM no delay mode */
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+ val = I2S_RXCR_TFS_PCM;
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+ break;
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+ case SND_SOC_DAIFMT_DSP_B: /* PCM delay 1 mode */
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+ val = I2S_RXCR_TFS_PCM | I2S_RXCR_PBM_MODE(1);
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+ break;
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default:
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return -EINVAL;
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}
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