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@@ -367,7 +367,7 @@
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#define MVPP22_XLG_CTRL0_RX_FLOW_CTRL_EN BIT(7)
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#define MVPP22_XLG_CTRL0_MIB_CNT_DIS BIT(14)
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#define MVPP22_XLG_CTRL1_REG 0x104
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-#define MVPP22_XLG_CTRL1_FRAMESIZELIMIT BIT(0)
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+#define MVPP22_XLG_CTRL1_FRAMESIZELIMIT_OFFS 0
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#define MVPP22_XLG_CTRL1_FRAMESIZELIMIT_MASK 0x1fff
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#define MVPP22_XLG_CTRL3_REG 0x11c
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#define MVPP22_XLG_CTRL3_MACMODESELECT_MASK (7 << 13)
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@@ -4669,7 +4669,7 @@ static inline void mvpp2_xlg_max_rx_size_set(struct mvpp2_port *port)
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val = readl(port->base + MVPP22_XLG_CTRL1_REG);
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val &= ~MVPP22_XLG_CTRL1_FRAMESIZELIMIT_MASK;
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val |= ((port->pkt_size - MVPP2_MH_SIZE) / 2) <<
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- MVPP22_XLG_CTRL1_FRAMESIZELIMIT;
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+ MVPP22_XLG_CTRL1_FRAMESIZELIMIT_OFFS;
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writel(val, port->base + MVPP22_XLG_CTRL1_REG);
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}
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