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@@ -60,7 +60,6 @@
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#define ZYNQ_GPIO_BANK5_PIN_MAX(str) (ZYNQ_GPIO_BANK5_PIN_MIN(str) + \
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ZYNQ##str##_GPIO_BANK5_NGPIO - 1)
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-
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/* Register offsets for the GPIO device */
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/* LSW Mask & Data -WO */
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#define ZYNQ_GPIO_DATA_LSW_OFFSET(BANK) (0x000 + (8 * BANK))
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@@ -112,6 +111,7 @@ struct gpio_regs {
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u32 int_polarity[ZYNQMP_GPIO_MAX_BANK];
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u32 int_any[ZYNQMP_GPIO_MAX_BANK];
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};
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+
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/**
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* struct zynq_gpio - gpio device private data structure
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* @chip: instance of the gpio_chip
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@@ -661,6 +661,7 @@ static void zynq_gpio_restore_context(struct zynq_gpio *gpio)
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ZYNQ_GPIO_INTANY_OFFSET(bank_num));
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}
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}
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+
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static int __maybe_unused zynq_gpio_suspend(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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