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@@ -2,191 +2,148 @@
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#ifndef _M68KNOMMU_IO_H
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#define _M68KNOMMU_IO_H
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-#ifdef __KERNEL__
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-
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-#define ARCH_HAS_IOREMAP_WT
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-
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-#include <asm/virtconvert.h>
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-#include <asm-generic/iomap.h>
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-
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/*
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- * These are for ISA/PCI shared memory _only_ and should never be used
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- * on any other type of memory, including Zorro memory. They are meant to
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- * access the bus in the bus byte order which is little-endian!.
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- *
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- * readX/writeX() are used to access memory mapped devices. On some
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- * architectures the memory mapped IO stuff needs to be accessed
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- * differently. On the m68k architecture, we just read/write the
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- * memory location directly.
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- */
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-/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
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- * two accesses to memory, which may be undesirable for some devices.
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+ * Convert a physical memory address into a IO memory address.
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+ * For us this is trivially a type cast.
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*/
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+#define iomem(a) ((void __iomem *) (a))
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/*
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- * swap functions are sometimes needed to interface little-endian hardware
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+ * The non-MMU m68k and ColdFire IO and memory mapped hardware access
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+ * functions have always worked in CPU native endian. We need to define
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+ * that behavior here first before we include asm-generic/io.h.
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*/
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-static inline unsigned short _swapw(volatile unsigned short v)
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-{
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- return ((v << 8) | (v >> 8));
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-}
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-
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-static inline unsigned int _swapl(volatile unsigned long v)
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-{
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- return ((v << 24) | ((v & 0xff00) << 8) | ((v & 0xff0000) >> 8) | (v >> 24));
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-}
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-
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-#define readb(addr) \
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+#define __raw_readb(addr) \
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({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; })
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-#define readw(addr) \
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+#define __raw_readw(addr) \
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({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; })
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-#define readl(addr) \
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+#define __raw_readl(addr) \
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({ unsigned int __v = (*(volatile unsigned int *) (addr)); __v; })
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-#define writeb(b,addr) (void)((*(volatile unsigned char *) (addr)) = (b))
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-#define writew(b,addr) (void)((*(volatile unsigned short *) (addr)) = (b))
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-#define writel(b,addr) (void)((*(volatile unsigned int *) (addr)) = (b))
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+#define __raw_writeb(b, addr) (void)((*(volatile unsigned char *) (addr)) = (b))
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+#define __raw_writew(b, addr) (void)((*(volatile unsigned short *) (addr)) = (b))
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+#define __raw_writel(b, addr) (void)((*(volatile unsigned int *) (addr)) = (b))
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-#define __raw_readb readb
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-#define __raw_readw readw
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-#define __raw_readl readl
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-#define __raw_writeb writeb
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-#define __raw_writew writew
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-#define __raw_writel writel
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+#if defined(CONFIG_COLDFIRE)
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+/*
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+ * For ColdFire platforms we may need to do some extra checks for what
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+ * type of address range we are accessing. Include the ColdFire platform
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+ * definitions so we can figure out if need to do something special.
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+ */
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+#include <asm/byteorder.h>
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+#include <asm/coldfire.h>
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+#include <asm/mcfsim.h>
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+#endif /* CONFIG_COLDFIRE */
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-static inline void io_outsb(unsigned int addr, const void *buf, int len)
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+#if defined(IOMEMBASE)
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+/*
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+ * The ColdFire SoC internal peripherals are mapped into virtual address
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+ * space using the ACR registers of the cache control unit. This means we
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+ * are using a 1:1 physical:virtual mapping for them. We can quickly
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+ * determine if we are accessing an internal peripheral device given the
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+ * physical or vitrual address using the same range check. This check logic
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+ * applies just the same of there is no MMU but something like a PCI bus
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+ * is present.
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+ */
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+static int __cf_internalio(unsigned long addr)
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{
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- volatile unsigned char *ap = (volatile unsigned char *) addr;
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- unsigned char *bp = (unsigned char *) buf;
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- while (len--)
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- *ap = *bp++;
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+ return (addr >= IOMEMBASE) && (addr <= IOMEMBASE + IOMEMSIZE - 1);
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}
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-static inline void io_outsw(unsigned int addr, const void *buf, int len)
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+static int cf_internalio(const volatile void __iomem *addr)
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{
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- volatile unsigned short *ap = (volatile unsigned short *) addr;
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- unsigned short *bp = (unsigned short *) buf;
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- while (len--)
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- *ap = _swapw(*bp++);
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+ return __cf_internalio((unsigned long) addr);
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}
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-static inline void io_outsl(unsigned int addr, const void *buf, int len)
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+/*
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+ * We need to treat built-in peripherals and bus based address ranges
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+ * differently. Local built-in peripherals (and the ColdFire SoC parts
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+ * have quite a lot of them) are always native endian - which is big
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+ * endian on m68k/ColdFire. Bus based address ranges, like the PCI bus,
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+ * are accessed little endian - so we need to byte swap those.
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+ */
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+#define readw readw
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+static inline u16 readw(const volatile void __iomem *addr)
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{
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- volatile unsigned int *ap = (volatile unsigned int *) addr;
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- unsigned int *bp = (unsigned int *) buf;
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- while (len--)
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- *ap = _swapl(*bp++);
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+ if (cf_internalio(addr))
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+ return __raw_readw(addr);
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+ return __le16_to_cpu(__raw_readw(addr));
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}
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-static inline void io_insb(unsigned int addr, void *buf, int len)
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+#define readl readl
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+static inline u32 readl(const volatile void __iomem *addr)
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{
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- volatile unsigned char *ap = (volatile unsigned char *) addr;
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- unsigned char *bp = (unsigned char *) buf;
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- while (len--)
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- *bp++ = *ap;
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+ if (cf_internalio(addr))
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+ return __raw_readl(addr);
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+ return __le32_to_cpu(__raw_readl(addr));
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}
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-static inline void io_insw(unsigned int addr, void *buf, int len)
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+#define writew writew
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+static inline void writew(u16 value, volatile void __iomem *addr)
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{
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- volatile unsigned short *ap = (volatile unsigned short *) addr;
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- unsigned short *bp = (unsigned short *) buf;
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- while (len--)
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- *bp++ = _swapw(*ap);
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+ if (cf_internalio(addr))
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+ __raw_writew(value, addr);
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+ else
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+ __raw_writew(__cpu_to_le16(value), addr);
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}
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-static inline void io_insl(unsigned int addr, void *buf, int len)
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+#define writel writel
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+static inline void writel(u32 value, volatile void __iomem *addr)
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{
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- volatile unsigned int *ap = (volatile unsigned int *) addr;
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- unsigned int *bp = (unsigned int *) buf;
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- while (len--)
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- *bp++ = _swapl(*ap);
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+ if (cf_internalio(addr))
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+ __raw_writel(value, addr);
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+ else
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+ __raw_writel(__cpu_to_le32(value), addr);
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}
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-#define mmiowb()
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-
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-/*
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- * make the short names macros so specific devices
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- * can override them as required
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- */
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-
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-#define memset_io(a,b,c) memset((void *)(a),(b),(c))
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-#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
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-#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
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-
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-#define inb(addr) readb(addr)
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-#define inw(addr) readw(addr)
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-#define inl(addr) readl(addr)
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-#define outb(x,addr) ((void) writeb(x,addr))
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-#define outw(x,addr) ((void) writew(x,addr))
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-#define outl(x,addr) ((void) writel(x,addr))
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-
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-#define inb_p(addr) inb(addr)
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-#define inw_p(addr) inw(addr)
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-#define inl_p(addr) inl(addr)
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-#define outb_p(x,addr) outb(x,addr)
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-#define outw_p(x,addr) outw(x,addr)
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-#define outl_p(x,addr) outl(x,addr)
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+#else
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-#define outsb(a,b,l) io_outsb(a,b,l)
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-#define outsw(a,b,l) io_outsw(a,b,l)
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-#define outsl(a,b,l) io_outsl(a,b,l)
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+#define readb __raw_readb
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+#define readw __raw_readw
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+#define readl __raw_readl
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+#define writeb __raw_writeb
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+#define writew __raw_writew
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+#define writel __raw_writel
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-#define insb(a,b,l) io_insb(a,b,l)
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-#define insw(a,b,l) io_insw(a,b,l)
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-#define insl(a,b,l) io_insl(a,b,l)
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-
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-#define IO_SPACE_LIMIT 0xffffffff
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-
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-
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-/* Values for nocacheflag and cmode */
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-#define IOMAP_FULL_CACHING 0
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-#define IOMAP_NOCACHE_SER 1
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-#define IOMAP_NOCACHE_NONSER 2
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-#define IOMAP_WRITETHROUGH 3
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-
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-static inline void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag)
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-{
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- return (void *) physaddr;
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-}
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-static inline void *ioremap(unsigned long physaddr, unsigned long size)
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-{
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- return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
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-}
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-static inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)
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-{
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- return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
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-}
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-static inline void *ioremap_wt(unsigned long physaddr, unsigned long size)
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-{
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- return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
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-}
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-static inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size)
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-{
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- return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
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-}
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-
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-#define iounmap(addr) do { } while(0)
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+#endif /* IOMEMBASE */
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+#if defined(CONFIG_PCI)
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/*
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- * Convert a physical pointer to a virtual kernel pointer for /dev/mem
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- * access
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+ * Support for PCI bus access uses the asm-generic access functions.
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+ * We need to supply the base address and masks for the normal memory
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+ * and IO address space mappings.
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*/
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-#define xlate_dev_mem_ptr(p) __va(p)
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+#define PCI_MEM_PA 0xf0000000 /* Host physical address */
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+#define PCI_MEM_BA 0xf0000000 /* Bus physical address */
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+#define PCI_MEM_SIZE 0x08000000 /* 128 MB */
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+#define PCI_MEM_MASK (PCI_MEM_SIZE - 1)
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+
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+#define PCI_IO_PA 0xf8000000 /* Host physical address */
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+#define PCI_IO_BA 0x00000000 /* Bus physical address */
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+#define PCI_IO_SIZE 0x00010000 /* 64k */
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+#define PCI_IO_MASK (PCI_IO_SIZE - 1)
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+
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+#define HAVE_ARCH_PIO_SIZE
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+#define PIO_OFFSET 0
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+#define PIO_MASK 0xffff
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+#define PIO_RESERVED 0x10000
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+#define PCI_IOBASE ((void __iomem *) PCI_IO_PA)
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+#define PCI_SPACE_LIMIT PCI_IO_MASK
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+#endif /* CONFIG_PCI */
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/*
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- * Convert a virtual cached pointer to an uncached pointer
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+ * These are defined in kmap.h as static inline functions. To maintain
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+ * previous behavior we put these define guards here so io_mm.h doesn't
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+ * see them.
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*/
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-#define xlate_dev_kmem_ptr(p) p
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+#ifdef CONFIG_MMU
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+#define memset_io memset_io
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+#define memcpy_fromio memcpy_fromio
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+#define memcpy_toio memcpy_toio
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+#endif
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-static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
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-{
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- return (void __iomem *) port;
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-}
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-
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-static inline void ioport_unmap(void __iomem *p)
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-{
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-}
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-
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-#endif /* __KERNEL__ */
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+#include <asm/kmap.h>
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+#include <asm/virtconvert.h>
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+#include <asm-generic/io.h>
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#endif /* _M68KNOMMU_IO_H */
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Linus Torvalds