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@@ -241,6 +241,9 @@ struct amd_pm_funcs {
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int (*set_clockgating_by_smu)(void *handle, uint32_t msg_id);
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int (*set_power_limit)(void *handle, uint32_t n);
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int (*get_power_limit)(void *handle, uint32_t *limit, bool default_limit);
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+ int (*get_power_profile_mode)(void *handle, char *buf);
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+ int (*set_power_profile_mode)(void *handle, long *input, uint32_t size);
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+ int (*odn_edit_dpm_table)(void *handle, uint32_t type, long *input, uint32_t size);
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/* export to DC */
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u32 (*get_sclk)(void *handle, bool low);
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u32 (*get_mclk)(void *handle, bool low);
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@@ -265,9 +268,7 @@ struct amd_pm_funcs {
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struct pp_display_clock_request *clock);
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int (*get_display_mode_validation_clocks)(void *handle,
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struct amd_pp_simple_clock_info *clocks);
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- int (*get_power_profile_mode)(void *handle, char *buf);
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- int (*set_power_profile_mode)(void *handle, long *input, uint32_t size);
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- int (*odn_edit_dpm_table)(void *handle, uint32_t type, long *input, uint32_t size);
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+ int (*notify_smu_enable_pwe)(void *handle);
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};
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#endif
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