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@@ -18,6 +18,9 @@
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#include <linux/of_irq.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/of_platform.h>
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#include "timer-of.h"
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#include "timer-of.h"
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+#ifdef CONFIG_NDS32
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+#include <asm/vdso_timer_info.h>
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+#endif
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/*
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/*
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* Definition of register offsets
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* Definition of register offsets
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@@ -204,6 +207,17 @@ static u64 notrace atcpit100_timer_sched_read(void)
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return ~readl(timer_of_base(&to) + CH1_CNT);
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return ~readl(timer_of_base(&to) + CH1_CNT);
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}
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}
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+#ifdef CONFIG_NDS32
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+static void fill_vdso_need_info(struct device_node *node)
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+{
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+ struct resource timer_res;
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+ of_address_to_resource(node, 0, &timer_res);
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+ timer_info.mapping_base = (unsigned long)timer_res.start;
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+ timer_info.cycle_count_down = true;
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+ timer_info.cycle_count_reg_offset = CH1_CNT;
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+}
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+#endif
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+
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static int __init atcpit100_timer_init(struct device_node *node)
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static int __init atcpit100_timer_init(struct device_node *node)
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{
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{
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int ret;
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int ret;
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@@ -242,6 +256,10 @@ static int __init atcpit100_timer_init(struct device_node *node)
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val = readl(base + INT_EN);
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val = readl(base + INT_EN);
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writel(val | CH0INT0EN, base + INT_EN);
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writel(val | CH0INT0EN, base + INT_EN);
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+#ifdef CONFIG_NDS32
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+ fill_vdso_need_info(node);
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+#endif
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+
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return ret;
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return ret;
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}
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}
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