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@@ -27,15 +27,23 @@ struct amd_l3_cache {
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};
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struct threshold_block {
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- unsigned int block;
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- unsigned int bank;
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- unsigned int cpu;
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- u32 address;
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- u16 interrupt_enable;
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- bool interrupt_capable;
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- u16 threshold_limit;
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- struct kobject kobj;
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- struct list_head miscj;
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+ unsigned int block; /* Number within bank */
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+ unsigned int bank; /* MCA bank the block belongs to */
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+ unsigned int cpu; /* CPU which controls MCA bank */
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+ u32 address; /* MSR address for the block */
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+ u16 interrupt_enable; /* Enable/Disable APIC interrupt */
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+ bool interrupt_capable; /* Bank can generate an interrupt. */
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+
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+ u16 threshold_limit; /*
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+ * Value upon which threshold
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+ * interrupt is generated.
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+ */
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+
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+ struct kobject kobj; /* sysfs object */
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+ struct list_head miscj; /*
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+ * List of threshold blocks
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+ * within a bank.
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+ */
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};
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struct threshold_bank {
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