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@@ -196,7 +196,7 @@ int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
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}
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spin_lock(&vm->status_lock);
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- list_del_init(&bo_base->vm_status);
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+ list_move(&bo_base->vm_status, &vm->relocated);
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}
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spin_unlock(&vm->status_lock);
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@@ -314,8 +314,10 @@ static int amdgpu_vm_alloc_levels(struct amdgpu_device *adev,
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entry->base.vm = vm;
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entry->base.bo = pt;
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list_add_tail(&entry->base.bo_list, &pt->va);
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- INIT_LIST_HEAD(&entry->base.vm_status);
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- entry->addr = 0;
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+ spin_lock(&vm->status_lock);
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+ list_add(&entry->base.vm_status, &vm->relocated);
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+ spin_unlock(&vm->status_lock);
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+ entry->addr = ~0ULL;
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}
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if (level < adev->vm_manager.num_level) {
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@@ -1000,18 +1002,17 @@ static int amdgpu_vm_wait_pd(struct amdgpu_device *adev, struct amdgpu_vm *vm,
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*/
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static int amdgpu_vm_update_level(struct amdgpu_device *adev,
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struct amdgpu_vm *vm,
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- struct amdgpu_vm_pt *parent,
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- unsigned level)
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+ struct amdgpu_vm_pt *parent)
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{
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struct amdgpu_bo *shadow;
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struct amdgpu_ring *ring = NULL;
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uint64_t pd_addr, shadow_addr = 0;
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- uint32_t incr = amdgpu_vm_bo_size(adev, level + 1);
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uint64_t last_pde = ~0, last_pt = ~0, last_shadow = ~0;
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unsigned count = 0, pt_idx, ndw = 0;
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struct amdgpu_job *job;
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struct amdgpu_pte_update_params params;
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struct dma_fence *fence = NULL;
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+ uint32_t incr;
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int r;
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@@ -1059,12 +1060,17 @@ static int amdgpu_vm_update_level(struct amdgpu_device *adev,
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/* walk over the address space and update the directory */
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for (pt_idx = 0; pt_idx <= parent->last_entry_used; ++pt_idx) {
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- struct amdgpu_bo *bo = parent->entries[pt_idx].base.bo;
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+ struct amdgpu_vm_pt *entry = &parent->entries[pt_idx];
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+ struct amdgpu_bo *bo = entry->base.bo;
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uint64_t pde, pt;
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if (bo == NULL)
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continue;
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+ spin_lock(&vm->status_lock);
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+ list_del_init(&entry->base.vm_status);
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+ spin_unlock(&vm->status_lock);
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+
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pt = amdgpu_bo_gpu_offset(bo);
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pt = amdgpu_gart_get_vm_pde(adev, pt);
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/* Don't update huge pages here */
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@@ -1075,6 +1081,7 @@ static int amdgpu_vm_update_level(struct amdgpu_device *adev,
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parent->entries[pt_idx].addr = pt | AMDGPU_PTE_VALID;
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pde = pd_addr + pt_idx * 8;
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+ incr = amdgpu_bo_size(bo);
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if (((last_pde + 8 * count) != pde) ||
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((last_pt + incr * count) != pt) ||
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(count == AMDGPU_VM_MAX_UPDATE_SIZE)) {
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@@ -1135,20 +1142,6 @@ static int amdgpu_vm_update_level(struct amdgpu_device *adev,
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dma_fence_put(fence);
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}
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}
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- /*
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- * Recurse into the subdirectories. This recursion is harmless because
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- * we only have a maximum of 5 layers.
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- */
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- for (pt_idx = 0; pt_idx <= parent->last_entry_used; ++pt_idx) {
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- struct amdgpu_vm_pt *entry = &parent->entries[pt_idx];
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-
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- if (!entry->base.bo)
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- continue;
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-
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- r = amdgpu_vm_update_level(adev, vm, entry, level + 1);
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- if (r)
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- return r;
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- }
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return 0;
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@@ -1164,7 +1157,8 @@ error_free:
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*
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* Mark all PD level as invalid after an error.
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*/
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-static void amdgpu_vm_invalidate_level(struct amdgpu_vm_pt *parent)
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+static void amdgpu_vm_invalidate_level(struct amdgpu_vm *vm,
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+ struct amdgpu_vm_pt *parent)
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{
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unsigned pt_idx;
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@@ -1179,7 +1173,10 @@ static void amdgpu_vm_invalidate_level(struct amdgpu_vm_pt *parent)
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continue;
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entry->addr = ~0ULL;
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- amdgpu_vm_invalidate_level(entry);
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+ spin_lock(&vm->status_lock);
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+ list_move(&entry->base.vm_status, &vm->relocated);
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+ spin_unlock(&vm->status_lock);
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+ amdgpu_vm_invalidate_level(vm, entry);
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}
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}
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@@ -1197,9 +1194,38 @@ int amdgpu_vm_update_directories(struct amdgpu_device *adev,
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{
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int r;
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- r = amdgpu_vm_update_level(adev, vm, &vm->root, 0);
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- if (r)
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- amdgpu_vm_invalidate_level(&vm->root);
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+ spin_lock(&vm->status_lock);
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+ while (!list_empty(&vm->relocated)) {
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+ struct amdgpu_vm_bo_base *bo_base;
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+ struct amdgpu_bo *bo;
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+
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+ bo_base = list_first_entry(&vm->relocated,
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+ struct amdgpu_vm_bo_base,
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+ vm_status);
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+ spin_unlock(&vm->status_lock);
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+
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+ bo = bo_base->bo->parent;
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+ if (bo) {
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+ struct amdgpu_vm_bo_base *parent;
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+ struct amdgpu_vm_pt *pt;
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+
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+ parent = list_first_entry(&bo->va,
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+ struct amdgpu_vm_bo_base,
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+ bo_list);
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+ pt = container_of(parent, struct amdgpu_vm_pt, base);
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+
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+ r = amdgpu_vm_update_level(adev, vm, pt);
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+ if (r) {
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+ amdgpu_vm_invalidate_level(vm, &vm->root);
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+ return r;
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+ }
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+ spin_lock(&vm->status_lock);
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+ } else {
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+ spin_lock(&vm->status_lock);
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+ list_del_init(&bo_base->vm_status);
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+ }
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+ }
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+ spin_unlock(&vm->status_lock);
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if (vm->use_cpu_for_update) {
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/* Flush HDP */
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@@ -1601,7 +1627,7 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
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error_free:
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amdgpu_job_free(job);
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- amdgpu_vm_invalidate_level(&vm->root);
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+ amdgpu_vm_invalidate_level(vm, &vm->root);
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return r;
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}
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@@ -2391,9 +2417,13 @@ void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev,
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continue;
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}
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- /* Don't add page tables to the moved state */
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- if (bo->tbo.type == ttm_bo_type_kernel)
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+ if (bo->tbo.type == ttm_bo_type_kernel) {
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+ spin_lock(&bo_base->vm->status_lock);
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+ if (list_empty(&bo_base->vm_status))
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+ list_add(&bo_base->vm_status, &vm->relocated);
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+ spin_unlock(&bo_base->vm->status_lock);
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continue;
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+ }
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spin_lock(&bo_base->vm->status_lock);
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list_move(&bo_base->vm_status, &bo_base->vm->moved);
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@@ -2483,6 +2513,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
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vm->reserved_vmid[i] = NULL;
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spin_lock_init(&vm->status_lock);
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INIT_LIST_HEAD(&vm->evicted);
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+ INIT_LIST_HEAD(&vm->relocated);
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INIT_LIST_HEAD(&vm->moved);
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INIT_LIST_HEAD(&vm->freed);
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