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@@ -64,9 +64,9 @@
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#define BCM2835_AUX_SPI_CNTL0_VAR_WIDTH 0x00004000
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#define BCM2835_AUX_SPI_CNTL0_VAR_WIDTH 0x00004000
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#define BCM2835_AUX_SPI_CNTL0_DOUTHOLD 0x00003000
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#define BCM2835_AUX_SPI_CNTL0_DOUTHOLD 0x00003000
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#define BCM2835_AUX_SPI_CNTL0_ENABLE 0x00000800
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#define BCM2835_AUX_SPI_CNTL0_ENABLE 0x00000800
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-#define BCM2835_AUX_SPI_CNTL0_CPHA_IN 0x00000400
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+#define BCM2835_AUX_SPI_CNTL0_IN_RISING 0x00000400
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#define BCM2835_AUX_SPI_CNTL0_CLEARFIFO 0x00000200
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#define BCM2835_AUX_SPI_CNTL0_CLEARFIFO 0x00000200
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-#define BCM2835_AUX_SPI_CNTL0_CPHA_OUT 0x00000100
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+#define BCM2835_AUX_SPI_CNTL0_OUT_RISING 0x00000100
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#define BCM2835_AUX_SPI_CNTL0_CPOL 0x00000080
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#define BCM2835_AUX_SPI_CNTL0_CPOL 0x00000080
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#define BCM2835_AUX_SPI_CNTL0_MSBF_OUT 0x00000040
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#define BCM2835_AUX_SPI_CNTL0_MSBF_OUT 0x00000040
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#define BCM2835_AUX_SPI_CNTL0_SHIFTLEN 0x0000003F
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#define BCM2835_AUX_SPI_CNTL0_SHIFTLEN 0x0000003F
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@@ -92,9 +92,6 @@
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#define BCM2835_AUX_SPI_POLLING_LIMIT_US 30
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#define BCM2835_AUX_SPI_POLLING_LIMIT_US 30
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#define BCM2835_AUX_SPI_POLLING_JIFFIES 2
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#define BCM2835_AUX_SPI_POLLING_JIFFIES 2
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-#define BCM2835_AUX_SPI_MODE_BITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH \
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- | SPI_NO_CS)
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-
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struct bcm2835aux_spi {
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struct bcm2835aux_spi {
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void __iomem *regs;
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void __iomem *regs;
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struct clk *clk;
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struct clk *clk;
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@@ -389,12 +386,12 @@ static int bcm2835aux_spi_prepare_message(struct spi_master *master,
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bs->cntl[1] = BCM2835_AUX_SPI_CNTL1_MSBF_IN;
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bs->cntl[1] = BCM2835_AUX_SPI_CNTL1_MSBF_IN;
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/* handle all the modes */
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/* handle all the modes */
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- if (spi->mode & SPI_CPOL)
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+ if (spi->mode & SPI_CPOL) {
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bs->cntl[0] |= BCM2835_AUX_SPI_CNTL0_CPOL;
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bs->cntl[0] |= BCM2835_AUX_SPI_CNTL0_CPOL;
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- if (spi->mode & SPI_CPHA)
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- bs->cntl[0] |= BCM2835_AUX_SPI_CNTL0_CPHA_OUT |
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- BCM2835_AUX_SPI_CNTL0_CPHA_IN;
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-
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+ bs->cntl[0] |= BCM2835_AUX_SPI_CNTL0_OUT_RISING;
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+ } else {
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+ bs->cntl[0] |= BCM2835_AUX_SPI_CNTL0_IN_RISING;
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+ }
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bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1]);
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bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1]);
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bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL0, bs->cntl[0]);
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bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL0, bs->cntl[0]);
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@@ -434,7 +431,7 @@ static int bcm2835aux_spi_probe(struct platform_device *pdev)
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}
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}
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platform_set_drvdata(pdev, master);
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platform_set_drvdata(pdev, master);
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- master->mode_bits = BCM2835_AUX_SPI_MODE_BITS;
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+ master->mode_bits = (SPI_CPOL | SPI_CS_HIGH | SPI_NO_CS);
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master->bits_per_word_mask = SPI_BPW_MASK(8);
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master->bits_per_word_mask = SPI_BPW_MASK(8);
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master->num_chipselect = -1;
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master->num_chipselect = -1;
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master->transfer_one = bcm2835aux_spi_transfer_one;
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master->transfer_one = bcm2835aux_spi_transfer_one;
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