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@@ -364,22 +364,9 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
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* has to also include the unfenced register the GPU uses
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* whilst executing a fenced command for an untiled object.
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*/
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-
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- obj->map_and_fenceable =
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- !i915_gem_obj_ggtt_bound(obj) ||
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- (i915_gem_obj_ggtt_offset(obj) +
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- obj->base.size <= dev_priv->gtt.mappable_end &&
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- i915_gem_object_fence_ok(obj, args->tiling_mode));
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-
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- /* Rebind if we need a change of alignment */
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- if (!obj->map_and_fenceable) {
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- u32 unfenced_align =
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- i915_gem_get_gtt_alignment(dev, obj->base.size,
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- args->tiling_mode,
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- false);
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- if (i915_gem_obj_ggtt_offset(obj) & (unfenced_align - 1))
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- ret = i915_gem_object_ggtt_unbind(obj);
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- }
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+ if (obj->map_and_fenceable &&
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+ !i915_gem_object_fence_ok(obj, args->tiling_mode))
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+ ret = i915_gem_object_ggtt_unbind(obj);
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if (ret == 0) {
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obj->fence_dirty =
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