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@@ -117,10 +117,10 @@ static inline u64 __raw_readq(const volatile void __iomem *addr)
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* ordering rules but do not guarantee any ordering relative to Normal memory
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* accesses.
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*/
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-#define readb_relaxed(c) ({ u8 __v = __raw_readb(c); __v; })
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-#define readw_relaxed(c) ({ u16 __v = le16_to_cpu((__force __le16)__raw_readw(c)); __v; })
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-#define readl_relaxed(c) ({ u32 __v = le32_to_cpu((__force __le32)__raw_readl(c)); __v; })
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-#define readq_relaxed(c) ({ u64 __v = le64_to_cpu((__force __le64)__raw_readq(c)); __v; })
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+#define readb_relaxed(c) ({ u8 __r = __raw_readb(c); __r; })
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+#define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16)__raw_readw(c)); __r; })
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+#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32)__raw_readl(c)); __r; })
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+#define readq_relaxed(c) ({ u64 __r = le64_to_cpu((__force __le64)__raw_readq(c)); __r; })
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#define writeb_relaxed(v,c) ((void)__raw_writeb((v),(c)))
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#define writew_relaxed(v,c) ((void)__raw_writew((__force u16)cpu_to_le16(v),(c)))
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