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@@ -86,6 +86,33 @@ static int si544_enable_output(struct clk_si544 *data, bool enable)
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SI544_OE_STATE_ODC_OE, enable ? SI544_OE_STATE_ODC_OE : 0);
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}
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+static int si544_prepare(struct clk_hw *hw)
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+{
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+ struct clk_si544 *data = to_clk_si544(hw);
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+
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+ return si544_enable_output(data, true);
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+}
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+
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+static void si544_unprepare(struct clk_hw *hw)
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+{
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+ struct clk_si544 *data = to_clk_si544(hw);
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+
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+ si544_enable_output(data, false);
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+}
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+
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+static int si544_is_prepared(struct clk_hw *hw)
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+{
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+ struct clk_si544 *data = to_clk_si544(hw);
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+ unsigned int val;
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+ int err;
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+
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+ err = regmap_read(data->regmap, SI544_REG_OE_STATE, &val);
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+ if (err < 0)
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+ return err;
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+
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+ return !!(val & SI544_OE_STATE_ODC_OE);
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+}
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+
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/* Retrieve clock multiplier and dividers from hardware */
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static int si544_get_muldiv(struct clk_si544 *data,
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struct clk_si544_muldiv *settings)
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@@ -273,6 +300,7 @@ static int si544_set_rate(struct clk_hw *hw, unsigned long rate,
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{
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struct clk_si544 *data = to_clk_si544(hw);
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struct clk_si544_muldiv settings;
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+ unsigned int old_oe_state;
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int err;
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if (!is_valid_frequency(data, rate))
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@@ -282,6 +310,10 @@ static int si544_set_rate(struct clk_hw *hw, unsigned long rate,
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if (err)
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return err;
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+ err = regmap_read(data->regmap, SI544_REG_OE_STATE, &old_oe_state);
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+ if (err)
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+ return err;
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+
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si544_enable_output(data, false);
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/* Allow FCAL for this frequency update */
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@@ -303,12 +335,16 @@ static int si544_set_rate(struct clk_hw *hw, unsigned long rate,
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/* Applying a new frequency can take up to 10ms */
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usleep_range(10000, 12000);
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- si544_enable_output(data, true);
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+ if (old_oe_state & SI544_OE_STATE_ODC_OE)
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+ si544_enable_output(data, true);
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return err;
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}
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static const struct clk_ops si544_clk_ops = {
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+ .prepare = si544_prepare,
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+ .unprepare = si544_unprepare,
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+ .is_prepared = si544_is_prepared,
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.recalc_rate = si544_recalc_rate,
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.round_rate = si544_round_rate,
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.set_rate = si544_set_rate,
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