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@@ -62,6 +62,7 @@ static int hns_roce_v2_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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struct hns_roce_v2_db sq_db;
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struct hns_roce_v2_db sq_db;
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unsigned int sge_ind = 0;
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unsigned int sge_ind = 0;
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unsigned int wqe_sz = 0;
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unsigned int wqe_sz = 0;
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+ unsigned int owner_bit;
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unsigned long flags;
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unsigned long flags;
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unsigned int ind;
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unsigned int ind;
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void *wqe = NULL;
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void *wqe = NULL;
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@@ -104,6 +105,7 @@ static int hns_roce_v2_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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qp->sq.wrid[(qp->sq.head + nreq) & (qp->sq.wqe_cnt - 1)] =
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qp->sq.wrid[(qp->sq.head + nreq) & (qp->sq.wqe_cnt - 1)] =
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wr->wr_id;
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wr->wr_id;
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+ owner_bit = ~(qp->sq.head >> ilog2(qp->sq.wqe_cnt)) & 0x1;
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rc_sq_wqe = wqe;
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rc_sq_wqe = wqe;
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memset(rc_sq_wqe, 0, sizeof(*rc_sq_wqe));
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memset(rc_sq_wqe, 0, sizeof(*rc_sq_wqe));
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for (i = 0; i < wr->num_sge; i++)
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for (i = 0; i < wr->num_sge; i++)
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@@ -120,6 +122,9 @@ static int hns_roce_v2_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_CQE_S,
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roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_CQE_S,
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(wr->send_flags & IB_SEND_SIGNALED) ? 1 : 0);
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(wr->send_flags & IB_SEND_SIGNALED) ? 1 : 0);
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+ roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_OWNER_S,
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+ owner_bit);
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+
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switch (wr->opcode) {
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switch (wr->opcode) {
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case IB_WR_RDMA_READ:
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case IB_WR_RDMA_READ:
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roce_set_field(rc_sq_wqe->byte_4,
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roce_set_field(rc_sq_wqe->byte_4,
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