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@@ -1285,6 +1285,22 @@ static void st_gpio_irq_unmask(struct irq_data *d)
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writel(BIT(d->hwirq), bank->base + REG_PIO_SET_PMASK);
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}
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+static int st_gpio_irq_request_resources(struct irq_data *d)
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+{
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+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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+
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+ st_gpio_direction_input(gc, d->hwirq);
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+
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+ return gpiochip_lock_as_irq(gc, d->hwirq);
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+}
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+
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+static void st_gpio_irq_release_resources(struct irq_data *d)
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+{
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+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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+
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+ gpiochip_unlock_as_irq(gc, d->hwirq);
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+}
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+
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static int st_gpio_irq_set_type(struct irq_data *d, unsigned type)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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@@ -1438,12 +1454,14 @@ static struct gpio_chip st_gpio_template = {
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};
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static struct irq_chip st_gpio_irqchip = {
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- .name = "GPIO",
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- .irq_disable = st_gpio_irq_mask,
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- .irq_mask = st_gpio_irq_mask,
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- .irq_unmask = st_gpio_irq_unmask,
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- .irq_set_type = st_gpio_irq_set_type,
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- .flags = IRQCHIP_SKIP_SET_WAKE,
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+ .name = "GPIO",
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+ .irq_request_resources = st_gpio_irq_request_resources,
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+ .irq_release_resources = st_gpio_irq_release_resources,
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+ .irq_disable = st_gpio_irq_mask,
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+ .irq_mask = st_gpio_irq_mask,
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+ .irq_unmask = st_gpio_irq_unmask,
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+ .irq_set_type = st_gpio_irq_set_type,
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+ .flags = IRQCHIP_SKIP_SET_WAKE,
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};
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static int st_gpiolib_register_bank(struct st_pinctrl *info,
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