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@@ -1462,6 +1462,9 @@ static void enable_execlists(struct intel_engine_cs *engine)
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I915_WRITE(RING_HWS_PGA(engine->mmio_base),
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engine->status_page.ggtt_offset);
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POSTING_READ(RING_HWS_PGA(engine->mmio_base));
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+
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+ /* Following the reset, we need to reload the CSB read/write pointers */
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+ engine->execlists.csb_head = -1;
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}
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static int gen8_init_common_ring(struct intel_engine_cs *engine)
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@@ -1478,11 +1481,6 @@ static int gen8_init_common_ring(struct intel_engine_cs *engine)
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enable_execlists(engine);
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- GEM_BUG_ON(engine->id >= ARRAY_SIZE(gtiir));
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-
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- execlists->csb_head = -1;
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- execlists->active = 0;
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-
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/* After a GPU reset, we may have requests to replay */
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if (execlists->first)
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tasklet_schedule(&execlists->tasklet);
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@@ -1528,6 +1526,8 @@ static void reset_irq(struct intel_engine_cs *engine)
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struct drm_i915_private *dev_priv = engine->i915;
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int i;
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+ GEM_BUG_ON(engine->id >= ARRAY_SIZE(gtiir));
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+
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/*
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* Clear any pending interrupt state.
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*
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@@ -1576,6 +1576,9 @@ static void reset_common_ring(struct intel_engine_cs *engine,
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spin_unlock_irqrestore(&engine->timeline->lock, flags);
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+ /* Mark all CS interrupts as complete */
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+ execlists->active = 0;
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+
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/* If the request was innocent, we leave the request in the ELSP
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* and will try to replay it on restarting. The context image may
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* have been corrupted by the reset, in which case we may have
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