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@@ -513,7 +513,7 @@ vlv_power_sequencer_kick(struct intel_dp *intel_dp)
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uint32_t DP;
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if (WARN(I915_READ(intel_dp->output_reg) & DP_PORT_EN,
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- "skipping pipe %c power seqeuncer kick due to port %c being active\n",
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+ "skipping pipe %c power sequencer kick due to port %c being active\n",
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pipe_name(pipe), port_name(intel_dig_port->base.port)))
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return;
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@@ -554,7 +554,7 @@ vlv_power_sequencer_kick(struct intel_dp *intel_dp)
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/*
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* Similar magic as in intel_dp_enable_port().
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* We _must_ do this port enable + disable trick
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- * to make this power seqeuencer lock onto the port.
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+ * to make this power sequencer lock onto the port.
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* Otherwise even VDD force bit won't work.
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*/
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I915_WRITE(intel_dp->output_reg, DP);
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@@ -3066,11 +3066,11 @@ static void vlv_detach_power_sequencer(struct intel_dp *intel_dp)
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edp_panel_vdd_off_sync(intel_dp);
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/*
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- * VLV seems to get confused when multiple power seqeuencers
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+ * VLV seems to get confused when multiple power sequencers
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* have the same port selected (even if only one has power/vdd
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* enabled). The failure manifests as vlv_wait_port_ready() failing
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* CHV on the other hand doesn't seem to mind having the same port
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- * selected in multiple power seqeuencers, but let's clear the
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+ * selected in multiple power sequencers, but let's clear the
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* port select always when logically disconnecting a power sequencer
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* from a port.
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*/
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@@ -5698,7 +5698,7 @@ intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp,
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/*
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* On some VLV machines the BIOS can leave the VDD
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- * enabled even on power seqeuencers which aren't
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+ * enabled even on power sequencers which aren't
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* hooked up to any port. This would mess up the
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* power domain tracking the first time we pick
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* one of these power sequencers for use since
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@@ -5706,7 +5706,7 @@ intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp,
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* already on and therefore wouldn't grab the power
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* domain reference. Disable VDD first to avoid this.
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* This also avoids spuriously turning the VDD on as
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- * soon as the new power seqeuencer gets initialized.
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+ * soon as the new power sequencer gets initialized.
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*/
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if (force_disable_vdd) {
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u32 pp = ironlake_get_pp_control(intel_dp);
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