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@@ -933,17 +933,17 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
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int pc_inc;
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/* XXX NEC Vr54xx bug workaround */
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- if (xcp->cp0_cause & CAUSEF_BD) {
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+ if (delay_slot(xcp)) {
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if (dec_insn.micro_mips_mode) {
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if (!mm_isBranchInstr(xcp, dec_insn, &contpc))
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- xcp->cp0_cause &= ~CAUSEF_BD;
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+ clear_delay_slot(xcp);
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} else {
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if (!isBranchInstr(xcp, dec_insn, &contpc))
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- xcp->cp0_cause &= ~CAUSEF_BD;
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+ clear_delay_slot(xcp);
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}
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}
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- if (xcp->cp0_cause & CAUSEF_BD) {
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+ if (delay_slot(xcp)) {
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/*
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* The instruction to be emulated is in a branch delay slot
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* which means that we have to emulate the branch instruction
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@@ -1178,7 +1178,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
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case bc_op:{
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int likely = 0;
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- if (xcp->cp0_cause & CAUSEF_BD)
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+ if (delay_slot(xcp))
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return SIGILL;
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#if __mips >= 4
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@@ -1201,7 +1201,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
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return SIGILL;
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}
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- xcp->cp0_cause |= CAUSEF_BD;
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+ set_delay_slot(xcp);
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if (cond) {
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/* branch taken: emulate dslot
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* instruction
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@@ -1321,7 +1321,7 @@ sigill:
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/* we did it !! */
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xcp->cp0_epc = contpc;
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- xcp->cp0_cause &= ~CAUSEF_BD;
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+ clear_delay_slot(xcp);
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return 0;
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}
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