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@@ -785,6 +785,29 @@ static int dvb_ca_en50221_write_data(struct dvb_ca_private *ca, int slot, u8 * b
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goto exit;
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}
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+ /*
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+ * It may need some time for the CAM to settle down, or there might
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+ * be a race condition between the CAM, writing HC and our last
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+ * check for DA. This happens, if the CAM asserts DA, just after
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+ * checking DA before we are setting HC. In this case it might be
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+ * a bug in the CAM to keep the FR bit, the lower layer/HW
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+ * communication requires a longer timeout or the CAM needs more
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+ * time internally. But this happens in reality!
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+ * We need to read the status from the HW again and do the same
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+ * we did for the previous check for DA
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+ */
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+ status = ca->pub->read_cam_control(ca->pub, slot, CTRLIF_STATUS);
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+ if (status < 0)
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+ goto exit;
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+
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+ if (status & (STATUSREG_DA | STATUSREG_RE)) {
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+ if (status & STATUSREG_DA)
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+ dvb_ca_en50221_thread_wakeup(ca);
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+
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+ status = -EAGAIN;
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+ goto exit;
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+ }
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+
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/* send the amount of data */
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if ((status = ca->pub->write_cam_control(ca->pub, slot, CTRLIF_SIZE_HIGH, bytes_write >> 8)) != 0)
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goto exit;
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