|
@@ -199,6 +199,19 @@
|
|
|
csr-mask = <0x3>;
|
|
|
clock-output-names = "xge1clk";
|
|
|
};
|
|
|
+
|
|
|
+ rngpkaclk: rngpkaclk@17000000 {
|
|
|
+ compatible = "apm,xgene-device-clock";
|
|
|
+ #clock-cells = <1>;
|
|
|
+ clocks = <&socplldiv2 0>;
|
|
|
+ reg = <0x0 0x17000000 0x0 0x2000>;
|
|
|
+ reg-names = "csr-reg";
|
|
|
+ csr-offset = <0xc>;
|
|
|
+ csr-mask = <0x10>;
|
|
|
+ enable-offset = <0x10>;
|
|
|
+ enable-mask = <0x10>;
|
|
|
+ clock-output-names = "rngpkaclk";
|
|
|
+ };
|
|
|
};
|
|
|
|
|
|
scu: system-clk-controller@17000000 {
|
|
@@ -306,5 +319,12 @@
|
|
|
local-mac-address = [00 01 73 00 00 02];
|
|
|
phy-connection-type = "xgmii";
|
|
|
};
|
|
|
+
|
|
|
+ rng: rng@10520000 {
|
|
|
+ compatible = "apm,xgene-rng";
|
|
|
+ reg = <0x0 0x10520000 0x0 0x100>;
|
|
|
+ interrupts = <0x0 0x41 0x4>;
|
|
|
+ clocks = <&rngpkaclk 0>;
|
|
|
+ };
|
|
|
};
|
|
|
};
|